[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v2 15/28] target/mips: Extract NEC Vr54xx helpers to vendor-vr54x
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH v2 15/28] target/mips: Extract NEC Vr54xx helpers to vendor-vr54xx_helper.c |
Date: |
Mon, 23 Nov 2020 21:44:35 +0100 |
Extract NEC Vr54xx helpers from op_helper.c to a new file:
'vendor-vr54xx_helper.c'.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201120210844.2625602-14-f4bug@amsat.org>
---
target/mips/op_helper.c | 118 --------------------------
target/mips/vendor-vr54xx_helper.c | 131 +++++++++++++++++++++++++++++
target/mips/meson.build | 1 +
3 files changed, 132 insertions(+), 118 deletions(-)
create mode 100644 target/mips/vendor-vr54xx_helper.c
diff --git a/target/mips/op_helper.c b/target/mips/op_helper.c
index dd09a4c714a..a900c008b5a 100644
--- a/target/mips/op_helper.c
+++ b/target/mips/op_helper.c
@@ -54,124 +54,6 @@ static void raise_exception(CPUMIPSState *env, uint32_t
exception)
do_raise_exception(env, exception, 0);
}
-/* 64 bits arithmetic for 32 bits hosts */
-static inline uint64_t get_HILO(CPUMIPSState *env)
-{
- return ((uint64_t)(env->active_tc.HI[0]) << 32) |
- (uint32_t)env->active_tc.LO[0];
-}
-
-static inline target_ulong set_HIT0_LO(CPUMIPSState *env, uint64_t HILO)
-{
- env->active_tc.LO[0] = (int32_t)(HILO & 0xFFFFFFFF);
- return env->active_tc.HI[0] = (int32_t)(HILO >> 32);
-}
-
-static inline target_ulong set_HI_LOT0(CPUMIPSState *env, uint64_t HILO)
-{
- target_ulong tmp = env->active_tc.LO[0] = (int32_t)(HILO & 0xFFFFFFFF);
- env->active_tc.HI[0] = (int32_t)(HILO >> 32);
- return tmp;
-}
-
-/* Multiplication variants of the vr54xx. */
-target_ulong helper_muls(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HI_LOT0(env, 0 - ((int64_t)(int32_t)arg1 *
- (int64_t)(int32_t)arg2));
-}
-
-target_ulong helper_mulsu(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HI_LOT0(env, 0 - (uint64_t)(uint32_t)arg1 *
- (uint64_t)(uint32_t)arg2);
-}
-
-target_ulong helper_macc(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HI_LOT0(env, (int64_t)get_HILO(env) + (int64_t)(int32_t)arg1 *
- (int64_t)(int32_t)arg2);
-}
-
-target_ulong helper_macchi(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HIT0_LO(env, (int64_t)get_HILO(env) + (int64_t)(int32_t)arg1 *
- (int64_t)(int32_t)arg2);
-}
-
-target_ulong helper_maccu(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HI_LOT0(env, (uint64_t)get_HILO(env) +
- (uint64_t)(uint32_t)arg1 * (uint64_t)(uint32_t)arg2);
-}
-
-target_ulong helper_macchiu(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HIT0_LO(env, (uint64_t)get_HILO(env) +
- (uint64_t)(uint32_t)arg1 * (uint64_t)(uint32_t)arg2);
-}
-
-target_ulong helper_msac(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HI_LOT0(env, (int64_t)get_HILO(env) - (int64_t)(int32_t)arg1 *
- (int64_t)(int32_t)arg2);
-}
-
-target_ulong helper_msachi(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HIT0_LO(env, (int64_t)get_HILO(env) - (int64_t)(int32_t)arg1 *
- (int64_t)(int32_t)arg2);
-}
-
-target_ulong helper_msacu(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HI_LOT0(env, (uint64_t)get_HILO(env) -
- (uint64_t)(uint32_t)arg1 * (uint64_t)(uint32_t)arg2);
-}
-
-target_ulong helper_msachiu(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HIT0_LO(env, (uint64_t)get_HILO(env) -
- (uint64_t)(uint32_t)arg1 * (uint64_t)(uint32_t)arg2);
-}
-
-target_ulong helper_mulhi(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HIT0_LO(env, (int64_t)(int32_t)arg1 * (int64_t)(int32_t)arg2);
-}
-
-target_ulong helper_mulhiu(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HIT0_LO(env, (uint64_t)(uint32_t)arg1 *
- (uint64_t)(uint32_t)arg2);
-}
-
-target_ulong helper_mulshi(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HIT0_LO(env, 0 - (int64_t)(int32_t)arg1 *
- (int64_t)(int32_t)arg2);
-}
-
-target_ulong helper_mulshiu(CPUMIPSState *env, target_ulong arg1,
- target_ulong arg2)
-{
- return set_HIT0_LO(env, 0 - (uint64_t)(uint32_t)arg1 *
- (uint64_t)(uint32_t)arg2);
-}
-
static inline target_ulong bitswap(target_ulong v)
{
v = ((v >> 1) & (target_ulong)0x5555555555555555ULL) |
diff --git a/target/mips/vendor-vr54xx_helper.c
b/target/mips/vendor-vr54xx_helper.c
new file mode 100644
index 00000000000..d8c8f648b54
--- /dev/null
+++ b/target/mips/vendor-vr54xx_helper.c
@@ -0,0 +1,131 @@
+/*
+ * MIPS NEC Vr54xx instruction emulation helpers for QEMU.
+ *
+ * Copyright (c) 2004-2005 Jocelyn Mayer
+ * Copyright (c) 2006 Marius Groeger (FPU operations)
+ * Copyright (c) 2006 Thiemo Seufer (MIPS32R2 support)
+ *
+ * SPDX-License-Identifier: LGPL-2.1-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "cpu.h"
+#include "exec/helper-proto.h"
+
+/* 64 bits arithmetic for 32 bits hosts */
+static inline uint64_t get_HILO(CPUMIPSState *env)
+{
+ return ((uint64_t)(env->active_tc.HI[0]) << 32) |
+ (uint32_t)env->active_tc.LO[0];
+}
+
+static inline target_ulong set_HIT0_LO(CPUMIPSState *env, uint64_t HILO)
+{
+ env->active_tc.LO[0] = (int32_t)(HILO & 0xFFFFFFFF);
+ return env->active_tc.HI[0] = (int32_t)(HILO >> 32);
+}
+
+static inline target_ulong set_HI_LOT0(CPUMIPSState *env, uint64_t HILO)
+{
+ target_ulong tmp = env->active_tc.LO[0] = (int32_t)(HILO & 0xFFFFFFFF);
+ env->active_tc.HI[0] = (int32_t)(HILO >> 32);
+ return tmp;
+}
+
+/* Multiplication variants of the vr54xx. */
+target_ulong helper_muls(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HI_LOT0(env, 0 - ((int64_t)(int32_t)arg1 *
+ (int64_t)(int32_t)arg2));
+}
+
+target_ulong helper_mulsu(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HI_LOT0(env, 0 - (uint64_t)(uint32_t)arg1 *
+ (uint64_t)(uint32_t)arg2);
+}
+
+target_ulong helper_macc(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HI_LOT0(env, (int64_t)get_HILO(env) + (int64_t)(int32_t)arg1 *
+ (int64_t)(int32_t)arg2);
+}
+
+target_ulong helper_macchi(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HIT0_LO(env, (int64_t)get_HILO(env) + (int64_t)(int32_t)arg1 *
+ (int64_t)(int32_t)arg2);
+}
+
+target_ulong helper_maccu(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HI_LOT0(env, (uint64_t)get_HILO(env) +
+ (uint64_t)(uint32_t)arg1 * (uint64_t)(uint32_t)arg2);
+}
+
+target_ulong helper_macchiu(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HIT0_LO(env, (uint64_t)get_HILO(env) +
+ (uint64_t)(uint32_t)arg1 * (uint64_t)(uint32_t)arg2);
+}
+
+target_ulong helper_msac(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HI_LOT0(env, (int64_t)get_HILO(env) - (int64_t)(int32_t)arg1 *
+ (int64_t)(int32_t)arg2);
+}
+
+target_ulong helper_msachi(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HIT0_LO(env, (int64_t)get_HILO(env) - (int64_t)(int32_t)arg1 *
+ (int64_t)(int32_t)arg2);
+}
+
+target_ulong helper_msacu(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HI_LOT0(env, (uint64_t)get_HILO(env) -
+ (uint64_t)(uint32_t)arg1 * (uint64_t)(uint32_t)arg2);
+}
+
+target_ulong helper_msachiu(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HIT0_LO(env, (uint64_t)get_HILO(env) -
+ (uint64_t)(uint32_t)arg1 * (uint64_t)(uint32_t)arg2);
+}
+
+target_ulong helper_mulhi(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HIT0_LO(env, (int64_t)(int32_t)arg1 * (int64_t)(int32_t)arg2);
+}
+
+target_ulong helper_mulhiu(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HIT0_LO(env, (uint64_t)(uint32_t)arg1 *
+ (uint64_t)(uint32_t)arg2);
+}
+
+target_ulong helper_mulshi(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HIT0_LO(env, 0 - (int64_t)(int32_t)arg1 *
+ (int64_t)(int32_t)arg2);
+}
+
+target_ulong helper_mulshiu(CPUMIPSState *env, target_ulong arg1,
+ target_ulong arg2)
+{
+ return set_HIT0_LO(env, 0 - (uint64_t)(uint32_t)arg1 *
+ (uint64_t)(uint32_t)arg2);
+}
diff --git a/target/mips/meson.build b/target/mips/meson.build
index aa6ac67df76..8cc1d0ca0f7 100644
--- a/target/mips/meson.build
+++ b/target/mips/meson.build
@@ -8,6 +8,7 @@
'op_helper.c',
'mod-dsp_helper.c',
'mod-msa_helper.c',
+ 'vendor-vr54xx_helper.c',
'translate.c',
))
--
2.26.2
- [PATCH v2 10/28] target/mips: Extract Multi-Threading helper definitions, (continued)
- [PATCH v2 10/28] target/mips: Extract Multi-Threading helper definitions, Philippe Mathieu-Daudé, 2020/11/23
- [PATCH v2 11/28] target/mips: Extract Code Compaction ASE translation routines, Philippe Mathieu-Daudé, 2020/11/23
- [PATCH v2 12/28] target/mips: Extract the microMIPS ISA helper definitions, Philippe Mathieu-Daudé, 2020/11/23
- [PATCH v2 13/28] target/mips: Extract the microMIPS ISA translation routines, Philippe Mathieu-Daudé, 2020/11/23
- [PATCH v2 14/28] target/mips: Extract nanoMIPS ISA translation routines, Philippe Mathieu-Daudé, 2020/11/23
- [PATCH v2 16/28] target/mips: Extract NEC Vr54xx helper definitions, Philippe Mathieu-Daudé, 2020/11/23
- [PATCH v2 17/28] target/mips: Extract NEC Vr54xx translation routines, Philippe Mathieu-Daudé, 2020/11/23
- [PATCH v2 19/28] target/mips: Extract Loongson SIMD helper definitions, Philippe Mathieu-Daudé, 2020/11/23
- [PATCH v2 18/28] target/mips: Rename lmmi_helper.c as loong-simd_helper.c, Philippe Mathieu-Daudé, 2020/11/23
- [PATCH v2 20/28] target/mips: Extract Loongson SIMD translation routines, Philippe Mathieu-Daudé, 2020/11/23
- [PATCH v2 15/28] target/mips: Extract NEC Vr54xx helpers to vendor-vr54xx_helper.c,
Philippe Mathieu-Daudé <=
- [PATCH v2 21/28] target/mips: Extract Loongson EXTensions translation routines, Philippe Mathieu-Daudé, 2020/11/23
- [PATCH v2 23/28] target/mips: Make pipeline 1 multiply opcodes generic, Philippe Mathieu-Daudé, 2020/11/23
- [PATCH v2 24/28] target/mips: Extract Toshiba TXx9 translation routines, Philippe Mathieu-Daudé, 2020/11/23
- [PATCH v2 22/28] target/mips: Extract XBurst Media eXtension Unit translation routines, Philippe Mathieu-Daudé, 2020/11/23
- [PATCH v2 25/28] target/mips: Extract Toshiba TX79 multimedia translation routines, Philippe Mathieu-Daudé, 2020/11/23
- [PATCH v2 26/28] MAINTAINERS: Add entry for MIPS Loongson TCG, Philippe Mathieu-Daudé, 2020/11/23
- [PATCH v2 27/28] MAINTAINERS: Add entry for MIPS Ingenic Xburst TCG, Philippe Mathieu-Daudé, 2020/11/23