Re: [PATCH 3/9] target/mips: Use CP0_Config3 to set MIPS_HFLAG

qemu-devel

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH 3/9] target/mips: Use CP0_Config3 to set MIPS_HFLAG_MSA

From:	Richard Henderson
Subject:	Re: [PATCH 3/9] target/mips: Use CP0_Config3 to set MIPS_HFLAG_MSA
Date:	Thu, 3 Dec 2020 11:10:44 -0600
User-agent:	Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0

On 12/2/20 12:44 PM, Philippe Mathieu-Daudé wrote:
> MSA presence is expressed by the MSAP bit of CP0_Config3.
> We don't need to check anything else.
> 
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  target/mips/internal.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~

[Prev in Thread]

Current Thread

[Next in Thread]

[PATCH 0/9] target/mips: Simplify MSA TCG logic, Philippe Mathieu-Daudé, 2020/12/02
- [PATCH 1/9] target/mips: Introduce ase_msa_available() helper, Philippe Mathieu-Daudé, 2020/12/02
  - Re: [PATCH 1/9] target/mips: Introduce ase_msa_available() helper, Richard Henderson, 2020/12/03
- [PATCH 2/9] target/mips: Simplify msa_reset(), Philippe Mathieu-Daudé, 2020/12/02
  - Re: [PATCH 2/9] target/mips: Simplify msa_reset(), Richard Henderson, 2020/12/03
- [PATCH 3/9] target/mips: Use CP0_Config3 to set MIPS_HFLAG_MSA, Philippe Mathieu-Daudé, 2020/12/02
  - Re: [PATCH 3/9] target/mips: Use CP0_Config3 to set MIPS_HFLAG_MSA, Richard Henderson <=
- [PATCH 4/9] target/mips: Simplify MSA TCG logic, Philippe Mathieu-Daudé, 2020/12/02
  - Re: [PATCH 4/9] target/mips: Simplify MSA TCG logic, Richard Henderson, 2020/12/03
- [PATCH 5/9] target/mips: Remove now unused ASE_MSA definition, Philippe Mathieu-Daudé, 2020/12/02
  - Re: [PATCH 5/9] target/mips: Remove now unused ASE_MSA definition, Richard Henderson, 2020/12/03
- [PATCH 6/9] target/mips: Alias MSA vector registers on FPU scalar registers, Philippe Mathieu-Daudé, 2020/12/02
  - Re: [PATCH 6/9] target/mips: Alias MSA vector registers on FPU scalar registers, Richard Henderson, 2020/12/04
    - Re: [PATCH 6/9] target/mips: Alias MSA vector registers on FPU scalar registers, Philippe Mathieu-Daudé, 2020/12/04
    - Re: [PATCH 6/9] target/mips: Alias MSA vector registers on FPU scalar registers, Richard Henderson, 2020/12/05
- [PATCH 7/9] target/mips: Extract msa_translate_init() from mips_tcg_init(), Philippe Mathieu-Daudé, 2020/12/02
  - Re: [PATCH 7/9] target/mips: Extract msa_translate_init() from mips_tcg_init(), Richard Henderson, 2020/12/04

Prev by Date: [Bug 1906694] Re: Assertion Failure in bdrv_co_write_req_prepare through megasas
Next by Date: Re: [PATCH 4/9] target/mips: Simplify MSA TCG logic
Previous by thread: [PATCH 3/9] target/mips: Use CP0_Config3 to set MIPS_HFLAG_MSA
Next by thread: [PATCH 4/9] target/mips: Simplify MSA TCG logic
Index(es):
- Date
- Thread