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[RFC v8 20/27] cpu: Move debug_excp_handler to tcg_ops
From: |
Claudio Fontana |
Subject: |
[RFC v8 20/27] cpu: Move debug_excp_handler to tcg_ops |
Date: |
Sat, 5 Dec 2020 17:15:11 +0100 |
From: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Claudio Fontana <cfontana@suse.de>
---
accel/tcg/cpu-exec.c | 4 ++--
include/hw/core/cpu.h | 2 --
include/hw/core/tcg-cpu-ops.h | 2 ++
target/arm/cpu.c | 2 +-
target/i386/tcg-cpu.c | 2 +-
target/lm32/cpu.c | 2 +-
target/s390x/cpu.c | 2 +-
target/xtensa/cpu.c | 2 +-
8 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
index edb349835e..343ae427a0 100644
--- a/accel/tcg/cpu-exec.c
+++ b/accel/tcg/cpu-exec.c
@@ -482,8 +482,8 @@ static inline void cpu_handle_debug_exception(CPUState *cpu)
}
}
- if (cc->debug_excp_handler) {
- cc->debug_excp_handler(cpu);
+ if (cc->tcg_ops.debug_excp_handler) {
+ cc->tcg_ops.debug_excp_handler(cpu);
}
}
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index c82ef261c6..f438abb785 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -121,7 +121,6 @@ struct TranslationBlock;
* @gdb_write_register: Callback for letting GDB write a register.
* @debug_check_watchpoint: Callback: return true if the architectural
* watchpoint whose address has matched should really fire.
- * @debug_excp_handler: Callback for handling debug exceptions.
* @write_elf64_note: Callback for writing a CPU-specific ELF note to a
* 64-bit VM coredump.
* @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF
@@ -184,7 +183,6 @@ struct CPUClass {
int (*gdb_read_register)(CPUState *cpu, GByteArray *buf, int reg);
int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg);
bool (*debug_check_watchpoint)(CPUState *cpu, CPUWatchpoint *wp);
- void (*debug_excp_handler)(CPUState *cpu);
int (*write_elf64_note)(WriteCoreDumpFunction f, CPUState *cpu,
int cpuid, void *opaque);
diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h
index 2ea94acca0..dbbc64418c 100644
--- a/include/hw/core/tcg-cpu-ops.h
+++ b/include/hw/core/tcg-cpu-ops.h
@@ -49,6 +49,8 @@ typedef struct TcgCpuOperations {
bool (*tlb_fill)(CPUState *cpu, vaddr address, int size,
MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr);
+ /** @debug_excp_handler: Callback for handling debug exceptions */
+ void (*debug_excp_handler)(CPUState *cpu);
} TcgCpuOperations;
#endif /* TCG_CPU_OPS_H */
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 0dac097367..20cbfaea51 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -2263,7 +2263,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void
*data)
cc->tcg_ops.cpu_exec_interrupt = arm_cpu_exec_interrupt;
cc->tcg_ops.synchronize_from_tb = arm_cpu_synchronize_from_tb;
cc->tcg_ops.tlb_fill = arm_cpu_tlb_fill;
- cc->debug_excp_handler = arm_debug_excp_handler;
+ cc->tcg_ops.debug_excp_handler = arm_debug_excp_handler;
cc->debug_check_watchpoint = arm_debug_check_watchpoint;
cc->do_unaligned_access = arm_cpu_do_unaligned_access;
#if !defined(CONFIG_USER_ONLY)
diff --git a/target/i386/tcg-cpu.c b/target/i386/tcg-cpu.c
index 8606dd6a3e..38ed8bf6d3 100644
--- a/target/i386/tcg-cpu.c
+++ b/target/i386/tcg-cpu.c
@@ -66,6 +66,6 @@ void tcg_cpu_common_class_init(CPUClass *cc)
cc->tcg_ops.initialize = tcg_x86_init;
cc->tcg_ops.tlb_fill = x86_cpu_tlb_fill;
#ifndef CONFIG_USER_ONLY
- cc->debug_excp_handler = breakpoint_handler;
+ cc->tcg_ops.debug_excp_handler = breakpoint_handler;
#endif
}
diff --git a/target/lm32/cpu.c b/target/lm32/cpu.c
index 76dc728858..bbe1405e32 100644
--- a/target/lm32/cpu.c
+++ b/target/lm32/cpu.c
@@ -235,7 +235,7 @@ static void lm32_cpu_class_init(ObjectClass *oc, void *data)
#endif
cc->gdb_num_core_regs = 32 + 7;
cc->gdb_stop_before_watchpoint = true;
- cc->debug_excp_handler = lm32_debug_excp_handler;
+ cc->tcg_ops.debug_excp_handler = lm32_debug_excp_handler;
cc->disas_set_info = lm32_cpu_disas_set_info;
cc->tcg_ops.initialize = lm32_translate_init;
}
diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
index 6cd2b30192..04856076b3 100644
--- a/target/s390x/cpu.c
+++ b/target/s390x/cpu.c
@@ -506,7 +506,7 @@ static void s390_cpu_class_init(ObjectClass *oc, void *data)
cc->write_elf64_note = s390_cpu_write_elf64_note;
#ifdef CONFIG_TCG
cc->tcg_ops.cpu_exec_interrupt = s390_cpu_exec_interrupt;
- cc->debug_excp_handler = s390x_cpu_debug_excp_handler;
+ cc->tcg_ops.debug_excp_handler = s390x_cpu_debug_excp_handler;
cc->do_unaligned_access = s390x_cpu_do_unaligned_access;
#endif
#endif
diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c
index e764dbeb73..b6f13ceb32 100644
--- a/target/xtensa/cpu.c
+++ b/target/xtensa/cpu.c
@@ -207,7 +207,7 @@ static void xtensa_cpu_class_init(ObjectClass *oc, void
*data)
cc->get_phys_page_debug = xtensa_cpu_get_phys_page_debug;
cc->do_transaction_failed = xtensa_cpu_do_transaction_failed;
#endif
- cc->debug_excp_handler = xtensa_breakpoint_handler;
+ cc->tcg_ops.debug_excp_handler = xtensa_breakpoint_handler;
cc->disas_set_info = xtensa_cpu_disas_set_info;
cc->tcg_ops.initialize = xtensa_translate_init;
dc->vmsd = &vmstate_xtensa_cpu;
--
2.26.2
- Re: [RFC v8 12/27] tcg: make CPUClass.cpu_exec_* optional, (continued)
- [RFC v8 10/27] i386: move TCG cpu class initialization out of helper.c, Claudio Fontana, 2020/12/05
- [RFC v8 26/27] hw/core/cpu: call qemu_init_vcpu in cpu_common_realizefn, Claudio Fontana, 2020/12/05
- [RFC v8 23/27] accel: introduce AccelCPUClass extending CPUClass, Claudio Fontana, 2020/12/05
- [RFC v8 24/27] i386: split cpu accelerators from cpu.c, using AccelCPUClass, Claudio Fontana, 2020/12/05
- [RFC v8 27/27] cpu: introduce cpu_accel_instance_init, Claudio Fontana, 2020/12/05
- [RFC v8 14/27] cpu: Remove unnecessary noop methods, Claudio Fontana, 2020/12/05
- [RFC v8 13/27] tcg: Make CPUClass.debug_excp_handler optional, Claudio Fontana, 2020/12/05
- [RFC v8 20/27] cpu: Move debug_excp_handler to tcg_ops,
Claudio Fontana <=
- [RFC v8 16/27] accel/tcg: split TCG-only code from cpu_exec_realizefn, Claudio Fontana, 2020/12/05
- [RFC v8 18/27] cpu: Move cpu_exec_* to tcg_ops, Claudio Fontana, 2020/12/05
- [RFC v8 21/27] accel: extend AccelState and AccelClass to user-mode, Claudio Fontana, 2020/12/05
- [RFC v8 25/27] cpu: call AccelCPUClass::cpu_realizefn in cpu_exec_realizefn, Claudio Fontana, 2020/12/05
- [RFC v8 22/27] accel: replace struct CpusAccel with AccelOpsClass, Claudio Fontana, 2020/12/05
- Re: [RFC v8 00/22] i386 cleanup, Claudio Fontana, 2020/12/05