[PATCH 08/13] target/mips: Convert Rel6 CACHE/PREF opcodes to decodetree

[Philippe Mathieu-Daudé]

CACHE/PREF opcodes have been removed from the Release 6.
Add a single decodetree entry for the opcodes, triggering
Reserved Instruction if ever used.

Remove unreachable check_insn_opc_removed() calls.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/mips/isa-mips32r6.decode | 3 +++
 target/mips/translate.c         | 2 --
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/target/mips/isa-mips32r6.decode b/target/mips/isa-mips32r6.decode
index 7b12a1bff25..e3b3934539a 100644
--- a/target/mips/isa-mips32r6.decode
+++ b/target/mips/isa-mips32r6.decode
@@ -19,3 +19,6 @@ LSA                 000000 ..... ..... ..... 000 .. 000101  
@lsa
 REMOVED             010011 ----- ----- ----- ----- ------   # COP1X (COP3)
 
 REMOVED             011100 ----- ----- ----- ----- ------   # SPECIAL2
+
+REMOVED             101111 ----- ----- ----------------     # CACHE
+REMOVED             110011 ----- ----- ----------------     # PREF
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 81ca1d45063..ba1b2360c50 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -28667,7 +28667,6 @@ static void decode_opc(CPUMIPSState *env, DisasContext 
*ctx)
         gen_st_cond(ctx, rt, rs, imm, MO_TESL, false);
         break;
     case OPC_CACHE:
-        check_insn_opc_removed(ctx, ISA_MIPS32R6);
         check_cp0_enabled(ctx);
         check_insn(ctx, ISA_MIPS3 | ISA_MIPS32);
         if (ctx->hflags & MIPS_HFLAG_ITC_CACHE) {
@@ -28676,7 +28675,6 @@ static void decode_opc(CPUMIPSState *env, DisasContext 
*ctx)
         /* Treat as NOP. */
         break;
     case OPC_PREF:
-        check_insn_opc_removed(ctx, ISA_MIPS32R6);
         if (ctx->insn_flags & INSN_R5900) {
             /* Treat as NOP. */
         } else {
-- 
2.26.2