[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 05/26] target/mips: Replace magic values by CP0PM_MASK or TARGET_P
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 05/26] target/mips: Replace magic values by CP0PM_MASK or TARGET_PAGE_BITS_MIN |
Date: |
Sun, 13 Dec 2020 21:19:25 +0100 |
Replace magic values related to page size:
12 -> TARGET_PAGE_BITS_MIN
13 -> CP0PM_MASK
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Huacai Chen <chenhc@lemote.com>
Message-Id: <20201109090422.2445166-2-f4bug@amsat.org>
---
target/mips/cp0_helper.c | 5 +++--
target/mips/helper.c | 4 ++--
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/target/mips/cp0_helper.c b/target/mips/cp0_helper.c
index a1b5140ccaf..e8b9343ec9c 100644
--- a/target/mips/cp0_helper.c
+++ b/target/mips/cp0_helper.c
@@ -904,7 +904,7 @@ void update_pagemask(CPUMIPSState *env, target_ulong arg1,
int32_t *pagemask)
goto invalid;
}
/* We don't support VTLB entry smaller than target page */
- if ((maskbits + 12) < TARGET_PAGE_BITS) {
+ if ((maskbits + TARGET_PAGE_BITS_MIN) < TARGET_PAGE_BITS) {
goto invalid;
}
env->CP0_PageMask = mask << CP0PM_MASK;
@@ -913,7 +913,8 @@ void update_pagemask(CPUMIPSState *env, target_ulong arg1,
int32_t *pagemask)
invalid:
/* When invalid, set to default target page size. */
- env->CP0_PageMask = (~TARGET_PAGE_MASK >> 12) << CP0PM_MASK;
+ mask = (~TARGET_PAGE_MASK >> TARGET_PAGE_BITS_MIN);
+ env->CP0_PageMask = mask << CP0PM_MASK;
}
void helper_mtc0_pagemask(CPUMIPSState *env, target_ulong arg1)
diff --git a/target/mips/helper.c b/target/mips/helper.c
index 063b65c0528..041432489d6 100644
--- a/target/mips/helper.c
+++ b/target/mips/helper.c
@@ -858,8 +858,8 @@ refill:
break;
}
}
- pw_pagemask = m >> 12;
- update_pagemask(env, pw_pagemask << 13, &pw_pagemask);
+ pw_pagemask = m >> TARGET_PAGE_BITS_MIN;
+ update_pagemask(env, pw_pagemask << CP0PM_MASK, &pw_pagemask);
pw_entryhi = (address & ~0x1fff) | (env->CP0_EntryHi & 0xFF);
{
target_ulong tmp_entryhi = env->CP0_EntryHi;
--
2.26.2
- [PULL 00/26] MIPS patches for 2020-12-13, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 01/26] MAINTAINERS: address@hidden -> address@hidden, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 03/26] target/mips/kvm: Remove unused headers, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 04/26] target/mips: Include "exec/memattrs.h" in 'internal.h', Philippe Mathieu-Daudé, 2020/12/13
- [PULL 02/26] target/mips/kvm: Assert unreachable code is not used, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 05/26] target/mips: Replace magic values by CP0PM_MASK or TARGET_PAGE_BITS_MIN,
Philippe Mathieu-Daudé <=
- [PULL 06/26] target/mips: Do not include CP0 helpers in user-mode emulation, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 07/26] target/mips: Remove unused headers from cp0_helper.c, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 08/26] target/mips: Also display exception names in user-mode, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 09/26] target/mips: Allow executing MSA instructions on Loongson-3A4000, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 10/26] target/mips: Explicit Release 6 MMU types, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 11/26] target/mips: Rename cpu_supports_FEAT() as cpu_type_supports_FEAT(), Philippe Mathieu-Daudé, 2020/12/13
- [PULL 12/26] target/mips: Introduce cpu_supports_isa() taking CPUMIPSState argument, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 13/26] hw/mips: Move address translation helpers to target/mips/, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 15/26] target/mips: Remove unused headers from op_helper.c, Philippe Mathieu-Daudé, 2020/12/13
- [PULL 14/26] target/mips: Remove unused headers from translate.c, Philippe Mathieu-Daudé, 2020/12/13