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[PATCH v5 22/23] tcg/ppc: Use tcg_constant_vec with tcg vec expanders
From: |
Richard Henderson |
Subject: |
[PATCH v5 22/23] tcg/ppc: Use tcg_constant_vec with tcg vec expanders |
Date: |
Thu, 17 Dec 2020 08:52:14 -0600 |
Improve expand_vec_shi to use sign-extraction for MO_32.
This allows a single VSPLTISB instruction to load all of
the valid shift constants.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/ppc/tcg-target.c.inc | 44 ++++++++++++++++++++++++----------------
1 file changed, 27 insertions(+), 17 deletions(-)
diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc
index 163a5bb32c..8778f729de 100644
--- a/tcg/ppc/tcg-target.c.inc
+++ b/tcg/ppc/tcg-target.c.inc
@@ -3332,13 +3332,22 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
static void expand_vec_shi(TCGType type, unsigned vece, TCGv_vec v0,
TCGv_vec v1, TCGArg imm, TCGOpcode opci)
{
- TCGv_vec t1 = tcg_temp_new_vec(type);
+ TCGv_vec t1;
- /* Splat w/bytes for xxspltib. */
- tcg_gen_dupi_vec(MO_8, t1, imm & ((8 << vece) - 1));
+ if (vece == MO_32) {
+ /*
+ * Only 5 bits are significant, and VSPLTISB can represent -16..15.
+ * So using negative numbers gets us the 4th bit easily.
+ */
+ imm = sextract32(imm, 0, 5);
+ } else {
+ imm &= (8 << vece) - 1;
+ }
+
+ /* Splat w/bytes for xxspltib when 2.07 allows MO_64. */
+ t1 = tcg_constant_vec(type, MO_8, imm);
vec_gen_3(opci, type, vece, tcgv_vec_arg(v0),
tcgv_vec_arg(v1), tcgv_vec_arg(t1));
- tcg_temp_free_vec(t1);
}
static void expand_vec_cmp(TCGType type, unsigned vece, TCGv_vec v0,
@@ -3396,7 +3405,7 @@ static void expand_vec_mul(TCGType type, unsigned vece,
TCGv_vec v0,
{
TCGv_vec t1 = tcg_temp_new_vec(type);
TCGv_vec t2 = tcg_temp_new_vec(type);
- TCGv_vec t3, t4;
+ TCGv_vec c0, c16;
switch (vece) {
case MO_8:
@@ -3415,21 +3424,22 @@ static void expand_vec_mul(TCGType type, unsigned vece,
TCGv_vec v0,
case MO_32:
tcg_debug_assert(!have_isa_2_07);
- t3 = tcg_temp_new_vec(type);
- t4 = tcg_temp_new_vec(type);
- tcg_gen_dupi_vec(MO_8, t4, -16);
+ /*
+ * Only 5 bits are significant, and VSPLTISB can represent -16..15.
+ * So using -16 is a quick way to represent 16.
+ */
+ c16 = tcg_constant_vec(type, MO_8, -16);
+ c0 = tcg_constant_vec(type, MO_8, 0);
+
vec_gen_3(INDEX_op_rotlv_vec, type, MO_32, tcgv_vec_arg(t1),
- tcgv_vec_arg(v2), tcgv_vec_arg(t4));
+ tcgv_vec_arg(v2), tcgv_vec_arg(c16));
vec_gen_3(INDEX_op_ppc_mulou_vec, type, MO_16, tcgv_vec_arg(t2),
tcgv_vec_arg(v1), tcgv_vec_arg(v2));
- tcg_gen_dupi_vec(MO_8, t3, 0);
- vec_gen_4(INDEX_op_ppc_msum_vec, type, MO_16, tcgv_vec_arg(t3),
- tcgv_vec_arg(v1), tcgv_vec_arg(t1), tcgv_vec_arg(t3));
- vec_gen_3(INDEX_op_shlv_vec, type, MO_32, tcgv_vec_arg(t3),
- tcgv_vec_arg(t3), tcgv_vec_arg(t4));
- tcg_gen_add_vec(MO_32, v0, t2, t3);
- tcg_temp_free_vec(t3);
- tcg_temp_free_vec(t4);
+ vec_gen_4(INDEX_op_ppc_msum_vec, type, MO_16, tcgv_vec_arg(t1),
+ tcgv_vec_arg(v1), tcgv_vec_arg(t1), tcgv_vec_arg(c0));
+ vec_gen_3(INDEX_op_shlv_vec, type, MO_32, tcgv_vec_arg(t1),
+ tcgv_vec_arg(t1), tcgv_vec_arg(c16));
+ tcg_gen_add_vec(MO_32, v0, t1, t2);
break;
default:
--
2.25.1
- [PATCH v5 03/23] tcg: Consolidate 3 bits into enum TCGTempKind, (continued)
- [PATCH v5 03/23] tcg: Consolidate 3 bits into enum TCGTempKind, Richard Henderson, 2020/12/17
- [PATCH v5 14/23] tcg: Use tcg_constant_{i32, i64} with tcg int expanders, Richard Henderson, 2020/12/17
- [PATCH v5 13/23] tcg: Use tcg_constant_i32 with icount expander, Richard Henderson, 2020/12/17
- [PATCH v5 11/23] tcg/optimize: Use tcg_constant_internal with constant folding, Richard Henderson, 2020/12/17
- [PATCH v5 12/23] tcg: Convert tcg_gen_dupi_vec to TCG_CONST, Richard Henderson, 2020/12/17
- [PATCH v5 19/23] tcg: Add tcg_reg_alloc_dup2, Richard Henderson, 2020/12/17
- [PATCH v5 15/23] tcg: Use tcg_constant_{i32,i64} with tcg plugins, Richard Henderson, 2020/12/17
- [PATCH v5 16/23] tcg: Use tcg_constant_{i32, i64, vec} with gvec expanders, Richard Henderson, 2020/12/17
- [PATCH v5 18/23] tcg: Remove movi and dupi opcodes, Richard Henderson, 2020/12/17
- [PATCH v5 20/23] tcg/i386: Use tcg_constant_vec with tcg vec expanders, Richard Henderson, 2020/12/17
- [PATCH v5 22/23] tcg/ppc: Use tcg_constant_vec with tcg vec expanders,
Richard Henderson <=
- [PATCH v5 23/23] tcg/aarch64: Use tcg_constant_vec with tcg vec expanders, Richard Henderson, 2020/12/17
- [PATCH v5 21/23] tcg: Remove tcg_gen_dup{8,16,32,64}i_vec, Richard Henderson, 2020/12/17
- [PATCH v5 17/23] tcg/tci: Add special tci_movi_{i32,i64} opcodes, Richard Henderson, 2020/12/17