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Re: [PATCH] RISC-V: Place DTB at 3GB boundary instead of 4GB

From: Bin Meng
Subject: Re: [PATCH] RISC-V: Place DTB at 3GB boundary instead of 4GB
Date: Fri, 18 Dec 2020 15:21:31 +0800

Hi Atish,

On Fri, Dec 18, 2020 at 5:48 AM Atish Patra <atish.patra@wdc.com> wrote:
> Currently, we place the DTB at 2MB from 4GB or end of DRAM which ever is
> lesser. However, Linux kernel can address only 1GB of memory for RV32.
> Thus, it can not map anything beyond 3GB (assuming 2GB is the starting 
> address).
> As a result, it can not process DT and panic if opensbi dynamic firmware
> is used.
> Fix this by placing the DTB at 2MB from 3GB or end of DRAM whichever is lower.
> Signed-off-by: Atish Patra <atish.patra@wdc.com>
> ---
>  hw/riscv/boot.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)

With this patch, 32-bit sifive_u still does not boot kernel with the
following patch applied on 5.10:

Command I used:
$ qemu-system-riscv32 -nographic -M sifive_u -m 1G -smp 5 -kernel

32-bit virt cannot boot the same kernel image with memory set to 2G either:
$ qemu-system-riscv32 -nographic -M virt -m 2G -smp 4 -kernel


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