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[PATCH 04/22] tcg/arm: Convert to tcg-target-constr.h
From: |
Richard Henderson |
Subject: |
[PATCH 04/22] tcg/arm: Convert to tcg-target-constr.h |
Date: |
Tue, 22 Dec 2020 22:01:46 -0800 |
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/arm/tcg-target-constr.h | 31 +++++++++++++++++++
tcg/arm/tcg-target.h | 1 +
tcg/arm/tcg-target.c.inc | 60 -------------------------------------
3 files changed, 32 insertions(+), 60 deletions(-)
create mode 100644 tcg/arm/tcg-target-constr.h
diff --git a/tcg/arm/tcg-target-constr.h b/tcg/arm/tcg-target-constr.h
new file mode 100644
index 0000000000..15c5e53406
--- /dev/null
+++ b/tcg/arm/tcg-target-constr.h
@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Arm target-specific operand constaints.
+ * Copyright (c) 2020 Linaro
+ */
+
+#define ALL_GENERAL_REGS 0xffffu
+
+#ifdef CONFIG_SOFTMMU
+#define ALL_QLOAD_REGS \
+ (ALL_GENERAL_REGS & ~((1 << TCG_REG_R0) | (1 << TCG_REG_R1) | \
+ (1 << TCG_REG_R2) | (1 << TCG_REG_R3) | \
+ (1 << TCG_REG_R14)))
+#define ALL_QSTORE_REGS \
+ (ALL_GENERAL_REGS & ~((1 << TCG_REG_R0) | (1 << TCG_REG_R1) | \
+ (1 << TCG_REG_R2) | (1 << TCG_REG_R14) | \
+ ((TARGET_LONG_BITS == 64) << TCG_REG_R3)))
+#else
+#define ALL_QLOAD_REGS ALL_GENERAL_REGS
+#define ALL_QSTORE_REGS \
+ (ALL_GENERAL_REGS & ~((1 << TCG_REG_R0) | (1 << TCG_REG_R1)))
+#endif
+
+REGS('r', ALL_GENERAL_REGS)
+REGS('l', ALL_QLOAD_REGS)
+REGS('s', ALL_QSTORE_REGS)
+
+CONST('I', TCG_CT_CONST_ARM)
+CONST('K', TCG_CT_CONST_INV)
+CONST('N', TCG_CT_CONST_NEG)
+CONST('Z', TCG_CT_CONST_ZERO)
diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h
index 17e771374d..6f058d6d9b 100644
--- a/tcg/arm/tcg-target.h
+++ b/tcg/arm/tcg-target.h
@@ -146,5 +146,6 @@ void tb_target_set_jmp_target(uintptr_t, uintptr_t,
uintptr_t);
#define TCG_TARGET_NEED_LDST_LABELS
#endif
#define TCG_TARGET_NEED_POOL_LABELS
+#define TCG_TARGET_CONSTR_H
#endif
diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc
index 62c37a954b..ab1b295293 100644
--- a/tcg/arm/tcg-target.c.inc
+++ b/tcg/arm/tcg-target.c.inc
@@ -234,66 +234,6 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
#define TCG_CT_CONST_NEG 0x400
#define TCG_CT_CONST_ZERO 0x800
-/* parse target specific constraints */
-static const char *target_parse_constraint(TCGArgConstraint *ct,
- const char *ct_str, TCGType type)
-{
- switch (*ct_str++) {
- case 'I':
- ct->ct |= TCG_CT_CONST_ARM;
- break;
- case 'K':
- ct->ct |= TCG_CT_CONST_INV;
- break;
- case 'N': /* The gcc constraint letter is L, already used here. */
- ct->ct |= TCG_CT_CONST_NEG;
- break;
- case 'Z':
- ct->ct |= TCG_CT_CONST_ZERO;
- break;
-
- case 'r':
- ct->regs = 0xffff;
- break;
-
- /* qemu_ld address */
- case 'l':
- ct->regs = 0xffff;
-#ifdef CONFIG_SOFTMMU
- /* r0-r2,lr will be overwritten when reading the tlb entry,
- so don't use these. */
- tcg_regset_reset_reg(ct->regs, TCG_REG_R0);
- tcg_regset_reset_reg(ct->regs, TCG_REG_R1);
- tcg_regset_reset_reg(ct->regs, TCG_REG_R2);
- tcg_regset_reset_reg(ct->regs, TCG_REG_R3);
- tcg_regset_reset_reg(ct->regs, TCG_REG_R14);
-#endif
- break;
-
- /* qemu_st address & data */
- case 's':
- ct->regs = 0xffff;
- /* r0-r2 will be overwritten when reading the tlb entry (softmmu only)
- and r0-r1 doing the byte swapping, so don't use these. */
- tcg_regset_reset_reg(ct->regs, TCG_REG_R0);
- tcg_regset_reset_reg(ct->regs, TCG_REG_R1);
-#if defined(CONFIG_SOFTMMU)
- /* Avoid clashes with registers being used for helper args */
- tcg_regset_reset_reg(ct->regs, TCG_REG_R2);
-#if TARGET_LONG_BITS == 64
- /* Avoid clashes with registers being used for helper args */
- tcg_regset_reset_reg(ct->regs, TCG_REG_R3);
-#endif
- tcg_regset_reset_reg(ct->regs, TCG_REG_R14);
-#endif
- break;
-
- default:
- return NULL;
- }
- return ct_str;
-}
-
static inline uint32_t rotl(uint32_t val, int n)
{
return (val << n) | (val >> (32 - n));
--
2.25.1
- [PATCH 00/22] tcg: backend constraints cleanup, Richard Henderson, 2020/12/23
- [PATCH 01/22] tcg/tci: Drop L and S constraints, Richard Henderson, 2020/12/23
- [PATCH 05/22] tcg/aarch64: Convert to tcg-target-constr.h, Richard Henderson, 2020/12/23
- [PATCH 03/22] tcg: Split out target constraints to tcg-target-constr.h, Richard Henderson, 2020/12/23
- [PATCH 13/22] tcg: Split out constraint sets to tcg-target-conset.h, Richard Henderson, 2020/12/23
- [PATCH 02/22] tcg/i386: Move constraint type check to tcg_target_const_match, Richard Henderson, 2020/12/23
- [PATCH 04/22] tcg/arm: Convert to tcg-target-constr.h,
Richard Henderson <=
- [PATCH 09/22] tcg/riscv: Convert to tcg-target-constr.h, Richard Henderson, 2020/12/23
- [PATCH 10/22] tcg/s390: Convert to tcg-target-constr.h, Richard Henderson, 2020/12/23
- [PATCH 07/22] tcg/tci: Convert to tcg-target-constr.h, Richard Henderson, 2020/12/23
- [PATCH 06/22] tcg/ppc: Convert to tcg-target-constr.h, Richard Henderson, 2020/12/23
- [PATCH 16/22] tcg/mips: Convert to tcg-target-conset.h, Richard Henderson, 2020/12/23
- [PATCH 22/22] tcg: Remove TCG_TARGET_CONSET_H, Richard Henderson, 2020/12/23
- [PATCH 17/22] tcg/ppc: Convert to tcg-target-conset.h, Richard Henderson, 2020/12/23
- [PATCH 11/22] tcg/sparc: Convert to tcg-target-constr.h, Richard Henderson, 2020/12/23
- [PATCH 15/22] tcg/arm: Convert to tcg-target-conset.h, Richard Henderson, 2020/12/23
- [PATCH 18/22] tcg/riscv: Convert to tcg-target-conset.h, Richard Henderson, 2020/12/23