Re: [PATCH v2 8/8] hw/mips/boston: Use bootloader helper to set GCRs

[Philippe Mathieu-Daudé]

On Wed, Jan 6, 2021 at 6:30 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
> On Wed, Jan 6, 2021 at 6:28 PM Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
> > On 12/15/20 7:46 AM, Jiaxun Yang wrote:
> > > Translate embedded assembly into IO writes which is more
> > > readable.
> > >
> > > Also hardcode cm_base at boot time instead of reading from CP0.
> > >
> > > Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> > > ---
> > >  hw/mips/boston.c | 45 ++++++++++++---------------------------------
> > >  1 file changed, 12 insertions(+), 33 deletions(-)
> > >
> > > diff --git a/hw/mips/boston.c b/hw/mips/boston.c
> > > index b622222c7d..9f08aa7285 100644
> > > --- a/hw/mips/boston.c
> > > +++ b/hw/mips/boston.c
> > > @@ -281,42 +281,21 @@ static void gen_firmware(uint32_t *p, hwaddr 
> > > kernel_entry, hwaddr fdt_addr,
> > >      const uint32_t gic_base = 0x16120000;
> > >      const uint32_t cpc_base = 0x16200000;
> > >
> > > -    /* Move CM GCRs */
> > >      if (is_64b) {
> > > -        stl_p(p++, 0x40287803);                 /* dmfc0 $8, CMGCRBase */
> > > -        stl_p(p++, 0x00084138);                 /* dsll $8, $8, 4 */
> > > +        bl_gen_write_u64(&p, cm_base,
> > > +                    cpu_mips_phys_to_kseg1(NULL, GCR_BASE_ADDR + 
> > > GCR_BASE_OFS));
> > > +        bl_gen_write_u64(&p, gic_base | GCR_GIC_BASE_GICEN_MSK,
> > > +                    cpu_mips_phys_to_kseg1(NULL, cm_base + 
> > > GCR_GIC_BASE_OFS));
> > > +        bl_gen_write_u64(&p, cpc_base | GCR_CPC_BASE_CPCEN_MSK,
> > > +                    cpu_mips_phys_to_kseg1(NULL, cm_base + 
> > > GCR_CPC_BASE_OFS));
> > >      } else {
> > > -        stl_p(p++, 0x40087803);                 /* mfc0 $8, CMGCRBase */
> > > -        stl_p(p++, 0x00084100);                 /* sll  $8, $8, 4 */
> > > +        bl_gen_write_u32(&p, cm_base,
> > > +                    cpu_mips_phys_to_kseg1(NULL, GCR_BASE_ADDR + 
> > > GCR_BASE_OFS));
> > > +        bl_gen_write_u32(&p, gic_base | GCR_GIC_BASE_GICEN_MSK,
> > > +                    cpu_mips_phys_to_kseg1(NULL, cm_base + 
> > > GCR_GIC_BASE_OFS));
> > > +        bl_gen_write_u32(&p, cpc_base | GCR_CPC_BASE_CPCEN_MSK,
> > > +                    cpu_mips_phys_to_kseg1(NULL, cm_base + 
> > > GCR_CPC_BASE_OFS));
> > >      }
> >
> > What about simplifying adding bl_gen_write_target_ulong() or
> > bl_gen_write_ulong()?
>
> bl_gen_store_ulong() similarly to bl_gen_load_ulong()?

bl_gen_write_ulong(). Anyway, can be done later, so:
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>