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[PULL 38/66] target/mips: Simplify msa_reset()
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 38/66] target/mips: Simplify msa_reset() |
Date: |
Thu, 7 Jan 2021 23:22:25 +0100 |
Call msa_reset() unconditionally, but only reset
the MSA registers if MSA is implemented.
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-Id: <20201208003702.4088927-3-f4bug@amsat.org>
---
target/mips/cpu.c | 5 +----
target/mips/cpu-defs.c.inc | 4 ++++
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index 45375ebc45c..4c590b90b25 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -531,10 +531,7 @@ static void mips_cpu_reset(DeviceState *dev)
env->hflags |= MIPS_HFLAG_M16;
}
- /* MSA */
- if (ase_msa_available(env)) {
- msa_reset(env);
- }
+ msa_reset(env);
compute_hflags(env);
restore_fp_status(env);
diff --git a/target/mips/cpu-defs.c.inc b/target/mips/cpu-defs.c.inc
index 535d4c0c702..fe0f47aadf8 100644
--- a/target/mips/cpu-defs.c.inc
+++ b/target/mips/cpu-defs.c.inc
@@ -978,6 +978,10 @@ static void mvp_init(CPUMIPSState *env)
static void msa_reset(CPUMIPSState *env)
{
+ if (!ase_msa_available(env)) {
+ return;
+ }
+
#ifdef CONFIG_USER_ONLY
/* MSA access enabled */
env->CP0_Config5 |= 1 << CP0C5_MSAEn;
--
2.26.2
- [PULL 28/66] target/mips/translate: Extract DisasContext structure, (continued)
- [PULL 28/66] target/mips/translate: Extract DisasContext structure, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 29/66] target/mips/translate: Add declarations for generic code, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 30/66] target/mips: Replace gen_exception_err(err=0) by gen_exception_end(), Philippe Mathieu-Daudé, 2021/01/07
- [PULL 31/66] target/mips: Replace gen_exception_end(EXCP_RI) by gen_rsvd_instruction, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 32/66] target/mips: Declare generic FPU functions in 'translate.h', Philippe Mathieu-Daudé, 2021/01/07
- [PULL 33/66] target/mips: Extract FPU specific definitions to translate.h, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 34/66] target/mips: Only build TCG code when CONFIG_TCG is set, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 35/66] target/mips/translate: Extract decode_opc_legacy() from decode_opc(), Philippe Mathieu-Daudé, 2021/01/07
- [PULL 36/66] target/mips/translate: Expose check_mips_64() to 32-bit mode, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 37/66] target/mips: Introduce ase_msa_available() helper, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 38/66] target/mips: Simplify msa_reset(),
Philippe Mathieu-Daudé <=
- [PULL 39/66] target/mips: Use CP0_Config3 to set MIPS_HFLAG_MSA, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 40/66] target/mips: Simplify MSA TCG logic, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 41/66] target/mips: Remove now unused ASE_MSA definition, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 42/66] target/mips: Alias MSA vector registers on FPU scalar registers, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 43/66] target/mips: Extract msa_translate_init() from mips_tcg_init(), Philippe Mathieu-Daudé, 2021/01/07
- [PULL 44/66] target/mips: Remove CPUMIPSState* argument from gen_msa*() methods, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 45/66] target/mips: Explode gen_msa_branch() as gen_msa_BxZ_V/BxZ(), Philippe Mathieu-Daudé, 2021/01/07
- [PULL 46/66] target/mips: Move msa_reset() to msa_helper.c, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 47/66] target/mips: Extract MSA helpers from op_helper.c, Philippe Mathieu-Daudé, 2021/01/07
- [PULL 48/66] target/mips: Extract MSA helper definitions, Philippe Mathieu-Daudé, 2021/01/07