Re: [RHEL7 qemu-kvm PATCH 3/3] Fix tcg_out_op argument mismatch warning

[Philippe Mathieu-Daudé]

On 1/11/21 12:30 PM, mrezanin@redhat.com wrote:
> From: Miroslav Rezanina <mrezanin@redhat.com>
> 
> There's prototype mismatch between tcg/tcg.c and tcg/aarch/tcg-target.c.inc:
> 
> tcg.c:
> 
>     static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
>                            const int *const_args);
> 
> tcg-target.c.inc:
> 
>     static void tcg_out_op(TCGContext *s, TCGOpcode opc,
>                            const TCGArg args[TCG_MAX_OP_ARGS],
>                            const int const_args[TCG_MAX_OP_ARGS])
> 
> This missmatch cause warnings on GCC 11:
> 
>     tcg/aarch64/tcg-target.c.inc:1855:37: error: argument 3 of type 'const 
> TCGArg[16]' {aka 'const long unsigned int[16]'} with mismatched bound 
> [-Werror=array-parameter=]
>     tcg/aarch64/tcg-target.c.inc:1856:34: error: argument 4 of type 'const 
> int[16]' with mismatched bound [-Werror=array-parameter=]

TIL. Interesting, compilers are getting smarter :)

> Only architectures with this definition are aarch and sparc. Fixing both 
> archs to use
> proper argument type.
> ---
>  tcg/aarch64/tcg-target.c.inc | 3 +--
>  tcg/sparc/tcg-target.c.inc   | 3 +--
>  2 files changed, 2 insertions(+), 4 deletions(-)
> 
> diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc
> index 26f71cb599..fe6bdbf721 100644
> --- a/tcg/aarch64/tcg-target.c.inc
> +++ b/tcg/aarch64/tcg-target.c.inc
> @@ -1852,8 +1852,7 @@ static void tcg_out_qemu_st(TCGContext *s, TCGReg 
> data_reg, TCGReg addr_reg,
>  static tcg_insn_unit *tb_ret_addr;
>  
>  static void tcg_out_op(TCGContext *s, TCGOpcode opc,
> -                       const TCGArg args[TCG_MAX_OP_ARGS],
> -                       const int const_args[TCG_MAX_OP_ARGS])
> +                       const TCGArg *args, const int *const_args)

Doing this way we loose information (that the array pointed has
TCG_MAX_OP_ARGS elements). What about letting this prototype and
fix the other uses?

>  {
>      /* 99% of the time, we can signal the use of extension registers
>         by looking to see if the opcode handles 64-bit data.  */
> diff --git a/tcg/sparc/tcg-target.c.inc b/tcg/sparc/tcg-target.c.inc
> index 6775bd30fc..976f0f05af 100644
> --- a/tcg/sparc/tcg-target.c.inc
> +++ b/tcg/sparc/tcg-target.c.inc
> @@ -1294,8 +1294,7 @@ static void tcg_out_qemu_st(TCGContext *s, TCGReg data, 
> TCGReg addr,
>  }
>  
>  static void tcg_out_op(TCGContext *s, TCGOpcode opc,
> -                       const TCGArg args[TCG_MAX_OP_ARGS],
> -                       const int const_args[TCG_MAX_OP_ARGS])
> +                       const TCGArg *args, const int *const_args)
>  {
>      TCGArg a0, a1, a2;
>      int c, c2;
>