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[PATCH v3 17/30] target/arm: Enforce alignment for RFE
From: |
Richard Henderson |
Subject: |
[PATCH v3 17/30] target/arm: Enforce alignment for RFE |
Date: |
Mon, 11 Jan 2021 09:01:00 -1000 |
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/translate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index dbe74e2c34..a0d543ec1f 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -8304,10 +8304,10 @@ static bool trans_RFE(DisasContext *s, arg_RFE *a)
/* Load PC into tmp and CPSR into tmp2. */
t1 = tcg_temp_new_i32();
- gen_aa32_ld32u(s, t1, addr, get_mem_index(s));
+ gen_aa32_ld_i32(s, t1, addr, get_mem_index(s), MO_UL | MO_ALIGN);
tcg_gen_addi_i32(addr, addr, 4);
t2 = tcg_temp_new_i32();
- gen_aa32_ld32u(s, t2, addr, get_mem_index(s));
+ gen_aa32_ld_i32(s, t2, addr, get_mem_index(s), MO_UL | MO_ALIGN);
if (a->w) {
/* Base writeback. */
--
2.25.1
- [PATCH v3 07/30] target/arm: Move TBFLAG_AM32 bits to the top, (continued)
- [PATCH v3 07/30] target/arm: Move TBFLAG_AM32 bits to the top, Richard Henderson, 2021/01/11
- [PATCH v3 08/30] target/arm: Move TBFLAG_ANY bits to the bottom, Richard Henderson, 2021/01/11
- [PATCH v3 09/30] target/arm: Add ALIGN_MEM to TBFLAG_ANY, Richard Henderson, 2021/01/11
- [PATCH v3 12/30] target/arm: Fix SCTLR_B test for TCGv_i64 load/store, Richard Henderson, 2021/01/11
- [PATCH v3 13/30] target/arm: Adjust gen_aa32_{ld, st}_i64 for align+endianness, Richard Henderson, 2021/01/11
- [PATCH v3 11/30] target/arm: Merge gen_aa32_frob64 into gen_aa32_ld_i64, Richard Henderson, 2021/01/11
- [PATCH v3 15/30] target/arm: Enforce alignment for LDA/LDAH/STL/STLH, Richard Henderson, 2021/01/11
- [PATCH v3 21/30] target/arm: Enforce alignment for VLDn (all lanes), Richard Henderson, 2021/01/11
- [PATCH v3 14/30] target/arm: Enforce word alignment for LDRD/STRD, Richard Henderson, 2021/01/11
- [PATCH v3 10/30] target/arm: Adjust gen_aa32_{ld, st}_i32 for align+endianness, Richard Henderson, 2021/01/11
- [PATCH v3 17/30] target/arm: Enforce alignment for RFE,
Richard Henderson <=
- [PATCH v3 24/30] target/arm: Use finalize_memop for aa64 gpr load/store, Richard Henderson, 2021/01/11
- [PATCH v3 26/30] target/arm: Enforce alignment for aa64 load-acq/store-rel, Richard Henderson, 2021/01/11
- [PATCH v3 19/30] target/arm: Enforce alignment for VLDM/VSTM, Richard Henderson, 2021/01/11
- [PATCH v3 27/30] target/arm: Use MemOp for size + endian in aa64 vector ld/st, Richard Henderson, 2021/01/11
- [PATCH v3 29/30] target/arm: Enforce alignment for aa64 vector LDn/STn (single), Richard Henderson, 2021/01/11
- [PATCH v3 28/30] target/arm: Enforce alignment for aa64 vector LDn/STn (multiple), Richard Henderson, 2021/01/11
- [PATCH v3 30/30] target/arm: Enforce alignment for sve LD1R, Richard Henderson, 2021/01/11
- [PATCH v3 25/30] target/arm: Use finalize_memop for aa64 fpr load/store, Richard Henderson, 2021/01/11
- [PATCH v3 18/30] target/arm: Enforce alignment for SRS, Richard Henderson, 2021/01/11
- [PATCH v3 16/30] target/arm: Enforce alignment for LDM/STM, Richard Henderson, 2021/01/11