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Re: [PATCH] util/cacheflush: Fix error generated by clang

From: Richard Henderson
Subject: Re: [PATCH] util/cacheflush: Fix error generated by clang
Date: Fri, 15 Jan 2021 06:39:59 -1000
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0

On 1/14/21 9:56 PM, Gan Qixin wrote:
> When compiling qemu-fuzz-i386 on aarch64 host, clang reported the following
> error:
> ../util/cacheflush.c:38:44: error: value size does not match register size
> specified by the constraint and modifier [-Werror,-Wasm-operand-widths]
>     asm volatile("mrs\t%0, ctr_el0" : "=r"(save_ctr_el0));
>                                            ^
> ../util/cacheflush.c:38:24: note: use constraint modifier "w"
>     asm volatile("mrs\t%0, ctr_el0" : "=r"(save_ctr_el0));
>                        ^~
>                        %w0
> Modify the type of save_ctr_el0 to uint64_t to fix it.
> Reported-by: Euler Robot <euler.robot@huawei.com>
> Signed-off-by: Gan Qixin <ganqixin@huawei.com>
> ---
> Cc: Richard Henderson <richard.henderson@linaro.org>
> Cc: Paolo Bonzini <pbonzini@redhat.com>
> ---
>  util/cacheflush.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)

This is clang being overly-picky.  IMO it should have done the mrs into a
64-bit register, then truncated the value when storing to the 32-bit variable.
 Which is what GCC does.  Certainly the code as written only needs the low 20
bits of the result.

But your change will not really make any difference to the generated code,
except for 4 more bytes of storage, so:

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


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