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[PULL 29/33] pvpanic : update pvpanic spec document
From: |
Peter Maydell |
Subject: |
[PULL 29/33] pvpanic : update pvpanic spec document |
Date: |
Tue, 19 Jan 2021 15:11:00 +0000 |
From: Mihai Carabas <mihai.carabas@oracle.com>
Add pvpanic PCI device support details in docs/specs/pvpanic.txt.
Signed-off-by: Mihai Carabas <mihai.carabas@oracle.com>
[fixed s/device/bus/ error]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
docs/specs/pvpanic.txt | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/docs/specs/pvpanic.txt b/docs/specs/pvpanic.txt
index a90fbca72b7..8afcde11cc8 100644
--- a/docs/specs/pvpanic.txt
+++ b/docs/specs/pvpanic.txt
@@ -1,7 +1,7 @@
PVPANIC DEVICE
==============
-pvpanic device is a simulated ISA device, through which a guest panic
+pvpanic device is a simulated device, through which a guest panic
event is sent to qemu, and a QMP event is generated. This allows
management apps (e.g. libvirt) to be notified and respond to the event.
@@ -9,6 +9,9 @@ The management app has the option of waiting for GUEST_PANICKED
events,
and/or polling for guest-panicked RunState, to learn when the pvpanic
device has fired a panic event.
+The pvpanic device can be implemented as an ISA device (using IOPORT) or as a
+PCI device.
+
ISA Interface
-------------
@@ -24,6 +27,14 @@ bit 1: a guest panic has happened and will be handled by the
guest;
the host should record it or report it, but should not affect
the execution of the guest.
+PCI Interface
+-------------
+
+The PCI interface is similar to the ISA interface except that it uses an MMIO
+address space provided by its BAR0, 1 byte long. Any machine with a PCI bus
+can enable a pvpanic device by adding '-device pvpanic-pci' to the command
+line.
+
ACPI Interface
--------------
--
2.20.1
- [PULL 18/33] target/arm: set HPFAR_EL2.NS on secure stage 2 faults, (continued)
- [PULL 18/33] target/arm: set HPFAR_EL2.NS on secure stage 2 faults, Peter Maydell, 2021/01/19
- [PULL 22/33] target/arm: refactor vae1_tlbmask(), Peter Maydell, 2021/01/19
- [PULL 24/33] target/arm: Update PFIRST, PNEXT for pred_desc, Peter Maydell, 2021/01/19
- [PULL 25/33] target/arm: Update ZIP, UZP, TRN for pred_desc, Peter Maydell, 2021/01/19
- [PULL 23/33] target/arm: Introduce PREDDESC field definitions, Peter Maydell, 2021/01/19
- [PULL 20/33] target/arm: Implement SCR_EL2.EEL2, Peter Maydell, 2021/01/19
- [PULL 19/33] target/arm: revector to run-time pick target EL, Peter Maydell, 2021/01/19
- [PULL 27/33] hw/misc/pvpanic: split-out generic and bus dependent code, Peter Maydell, 2021/01/19
- [PULL 28/33] hw/misc/pvpanic: add PCI interface support, Peter Maydell, 2021/01/19
- [PULL 26/33] target/arm: Update REV, PUNPK for pred_desc, Peter Maydell, 2021/01/19
- [PULL 29/33] pvpanic : update pvpanic spec document,
Peter Maydell <=
- [PULL 33/33] docs: Build and install all the docs in a single manual, Peter Maydell, 2021/01/19
- [PULL 32/33] target/arm/m_helper: Silence GCC 10 maybe-uninitialized error, Peter Maydell, 2021/01/19
- [PULL 31/33] npcm7xx_adc-test: Fix memleak in adc_qom_set, Peter Maydell, 2021/01/19
- [PULL 30/33] tests/qtest: add a test case for pvpanic-pci, Peter Maydell, 2021/01/19
- Re: [PULL 00/33] target-arm queue, no-reply, 2021/01/19