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Re: [PATCHv9 0/3] arm-virt: add secure pl061 for reset/power down

From: Peter Maydell
Subject: Re: [PATCHv9 0/3] arm-virt: add secure pl061 for reset/power down
Date: Fri, 22 Jan 2021 23:34:29 +0000

On Fri, 22 Jan 2021 at 21:52, Maxim Uvarov <maxim.uvarov@linaro.org> wrote:
>  v9: - cosmetic changes (move if from patch2 to patch3, rename function name
>        and define).
>  v8: - use gpio 0 and 1, align dtb with kernel gpio-restart, gpio-poweroff,
>        change define names, trigger on upper front. (Peter Maydell).
>  v7: - same as v6, but resplit patches: patch 2 no function changes and 
> refactor
>         gpio setup for virt platfrom and patch 3 adds secure gpio.
>  v6: - 64k align gpio memory region (Andrew Jones)
>      - adjusted memory region to map this address in the corresponding atf 
> patch
>  v5: - removed vms flag, added fdt  (Andrew Jones)
>      - added patch3 to combine secure and non secure pl061. It has to be
>        more easy to review if this changes are in the separate patch.
>  v4: rework patches accodring to Peter Maydells comments:
>         - split patches on gpio-pwr driver and arm-virt integration.
>         - start secure gpio only from virt-6.0.
>         - rework qemu interface for gpio-pwr to use 2 named gpio.
>         - put secure gpio to secure name space.
>  v3: added missed include qemu/log.h for qemu_log(..
>  v2: replace printf with qemu_log (Philippe Mathieu-Daudé)
> This patch works together with ATF patch:
> https://github.com/muvarov/arm-trusted-firmware/commit/886965bddb0624bdf85103efb2b39fd4eb73d89b
> Maxim Uvarov (3):
>   hw: gpio: implement gpio-pwr driver for qemu reset/poweroff
>   arm-virt: refactor gpios creation
>   arm-virt: add secure pl061 for reset/power down

Applied to target-arm.next, thanks. I realized we forgot the
documentation, so I'm going to squash this change in to patch 3:

--- a/docs/system/arm/virt.rst
+++ b/docs/system/arm/virt.rst
@@ -43,6 +43,8 @@ The virt board supports:
 - Secure-World-only devices if the CPU has TrustZone:

   - A second PL011 UART
+  - A second PL061 GPIO controller, with GPIO lines for triggering
+    a system reset or system poweroff
   - A secure flash memory
   - 16MB of secure RAM

-- PMM

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