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[PATCH v3 7/9] docs/system: Sort targets in alphabetical order
From: |
Bin Meng |
Subject: |
[PATCH v3 7/9] docs/system: Sort targets in alphabetical order |
Date: |
Tue, 26 Jan 2021 14:00:05 +0800 |
From: Bin Meng <bin.meng@windriver.com>
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
(no changes since v1)
docs/system/targets.rst | 19 ++++++++++++-------
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git a/docs/system/targets.rst b/docs/system/targets.rst
index 560783644d..564cea9a9b 100644
--- a/docs/system/targets.rst
+++ b/docs/system/targets.rst
@@ -7,16 +7,21 @@ various targets are mentioned in the following sections.
Contents:
+..
+ This table of contents should be kept sorted alphabetically
+ by the title text of each file, which isn't the same ordering
+ as an alphabetical sort by filename.
+
.. toctree::
- target-i386
+ target-arm
+ target-avr
+ target-m68k
+ target-mips
target-ppc
+ target-rx
+ target-s390x
target-sparc
target-sparc64
- target-mips
- target-arm
- target-m68k
+ target-i386
target-xtensa
- target-s390x
- target-rx
- target-avr
--
2.25.1
- [PATCH v3 0/9] hw/riscv: sifive_u: Add missing SPI support, Bin Meng, 2021/01/26
- [PATCH v3 1/9] hw/block: m25p80: Add ISSI SPI flash support, Bin Meng, 2021/01/26
- [PATCH v3 2/9] hw/block: m25p80: Add various ISSI flash information, Bin Meng, 2021/01/26
- [PATCH v3 3/9] hw/ssi: Add SiFive SPI controller support, Bin Meng, 2021/01/26
- [PATCH v3 4/9] hw/riscv: sifive_u: Add QSPI0 controller and connect a flash, Bin Meng, 2021/01/26
- [PATCH v3 5/9] hw/riscv: sifive_u: Add QSPI2 controller and connect an SD card, Bin Meng, 2021/01/26
- [PATCH v3 6/9] hw/riscv: sifive_u: Change SIFIVE_U_GEM_IRQ to decimal value, Bin Meng, 2021/01/26
- [PATCH v3 7/9] docs/system: Sort targets in alphabetical order,
Bin Meng <=
- [PATCH v3 8/9] docs/system: Add RISC-V documentation, Bin Meng, 2021/01/26
- [PATCH v3 9/9] docs/system: riscv: Add documentation for sifive_u machine, Bin Meng, 2021/01/26