[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 42/46] tests/qtest/cmsdk-apb-watchdog-test: Test clock changes
From: |
Peter Maydell |
Subject: |
[PULL 42/46] tests/qtest/cmsdk-apb-watchdog-test: Test clock changes |
Date: |
Fri, 29 Jan 2021 11:00:08 +0000 |
Now that the CMSDK APB watchdog uses its Clock input, it will
correctly respond when the system clock frequency is changed using
the RCC register on in the Stellaris board system registers. Test
that when the RCC register is written it causes the watchdog timer to
change speed.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Luc Michel <luc@lmichel.fr>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210128114145.20536-22-peter.maydell@linaro.org
Message-id: 20210121190622.22000-22-peter.maydell@linaro.org
---
tests/qtest/cmsdk-apb-watchdog-test.c | 52 +++++++++++++++++++++++++++
1 file changed, 52 insertions(+)
diff --git a/tests/qtest/cmsdk-apb-watchdog-test.c
b/tests/qtest/cmsdk-apb-watchdog-test.c
index 950f64c527b..2710cb17b86 100644
--- a/tests/qtest/cmsdk-apb-watchdog-test.c
+++ b/tests/qtest/cmsdk-apb-watchdog-test.c
@@ -15,6 +15,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/bitops.h"
#include "libqtest-single.h"
/*
@@ -31,6 +32,11 @@
#define WDOGMIS 0x14
#define WDOGLOCK 0xc00
+#define SSYS_BASE 0x400fe000
+#define RCC 0x60
+#define SYSDIV_SHIFT 23
+#define SYSDIV_LENGTH 4
+
static void test_watchdog(void)
{
g_assert_cmpuint(readl(WDOG_BASE + WDOGRIS), ==, 0);
@@ -61,6 +67,50 @@ static void test_watchdog(void)
g_assert_cmpuint(readl(WDOG_BASE + WDOGRIS), ==, 0);
}
+static void test_clock_change(void)
+{
+ uint32_t rcc;
+
+ /*
+ * Test that writing to the stellaris board's RCC register to
+ * change the system clock frequency causes the watchdog
+ * to change the speed it counts at.
+ */
+ g_assert_cmpuint(readl(WDOG_BASE + WDOGRIS), ==, 0);
+
+ writel(WDOG_BASE + WDOGCONTROL, 1);
+ writel(WDOG_BASE + WDOGLOAD, 1000);
+
+ /* Step to just past the 500th tick */
+ clock_step(80 * 500 + 1);
+ g_assert_cmpuint(readl(WDOG_BASE + WDOGRIS), ==, 0);
+ g_assert_cmpuint(readl(WDOG_BASE + WDOGVALUE), ==, 500);
+
+ /* Rewrite RCC.SYSDIV from 16 to 8, so the clock is now 40ns per tick */
+ rcc = readl(SSYS_BASE + RCC);
+ g_assert_cmpuint(extract32(rcc, SYSDIV_SHIFT, SYSDIV_LENGTH), ==, 0xf);
+ rcc = deposit32(rcc, SYSDIV_SHIFT, SYSDIV_LENGTH, 7);
+ writel(SSYS_BASE + RCC, rcc);
+
+ /* Just past the 1000th tick: timer should have fired */
+ clock_step(40 * 500);
+ g_assert_cmpuint(readl(WDOG_BASE + WDOGRIS), ==, 1);
+
+ g_assert_cmpuint(readl(WDOG_BASE + WDOGVALUE), ==, 0);
+
+ /* VALUE reloads at following tick */
+ clock_step(41);
+ g_assert_cmpuint(readl(WDOG_BASE + WDOGVALUE), ==, 1000);
+
+ /* Writing any value to WDOGINTCLR clears the interrupt and reloads */
+ clock_step(40 * 500);
+ g_assert_cmpuint(readl(WDOG_BASE + WDOGVALUE), ==, 500);
+ g_assert_cmpuint(readl(WDOG_BASE + WDOGRIS), ==, 1);
+ writel(WDOG_BASE + WDOGINTCLR, 0);
+ g_assert_cmpuint(readl(WDOG_BASE + WDOGVALUE), ==, 1000);
+ g_assert_cmpuint(readl(WDOG_BASE + WDOGRIS), ==, 0);
+}
+
int main(int argc, char **argv)
{
int r;
@@ -70,6 +120,8 @@ int main(int argc, char **argv)
qtest_start("-machine lm3s811evb");
qtest_add_func("/cmsdk-apb-watchdog/watchdog", test_watchdog);
+ qtest_add_func("/cmsdk-apb-watchdog/watchdog_clock_change",
+ test_clock_change);
r = g_test_run();
--
2.20.1
- [PULL 25/46] tests: Add a simple test of the CMSDK APB watchdog, (continued)
- [PULL 25/46] tests: Add a simple test of the CMSDK APB watchdog, Peter Maydell, 2021/01/29
- [PULL 32/46] hw/arm/armsse: Wire up clocks, Peter Maydell, 2021/01/29
- [PULL 33/46] hw/arm/mps2: Inline CMSDK_APB_TIMER creation, Peter Maydell, 2021/01/29
- [PULL 34/46] hw/arm/mps2: Create and connect SYSCLK Clock, Peter Maydell, 2021/01/29
- [PULL 38/46] hw/arm/stellaris: Create Clock input for watchdog, Peter Maydell, 2021/01/29
- [PULL 36/46] hw/arm/musca: Create and connect ARMSSE Clocks, Peter Maydell, 2021/01/29
- [PULL 30/46] hw/watchdog/cmsdk-apb-watchdog: Add Clock input, Peter Maydell, 2021/01/29
- [PULL 41/46] hw/watchdog/cmsdk-apb-watchdog: Convert to use Clock input, Peter Maydell, 2021/01/29
- [PULL 40/46] hw/timer/cmsdk-apb-dualtimer: Convert to use Clock input, Peter Maydell, 2021/01/29
- [PULL 28/46] hw/timer/cmsdk-apb-timer: Add Clock input, Peter Maydell, 2021/01/29
- [PULL 42/46] tests/qtest/cmsdk-apb-watchdog-test: Test clock changes,
Peter Maydell <=
- [PULL 44/46] arm: Don't set freq properties on CMSDK timer, dualtimer, watchdog, ARMSSE, Peter Maydell, 2021/01/29
- [PULL 45/46] arm: Remove frq properties on CMSDK timer, dualtimer, watchdog, ARMSSE, Peter Maydell, 2021/01/29
- [PULL 31/46] hw/arm/armsse: Rename "MAINCLK" property to "MAINCLK_FRQ", Peter Maydell, 2021/01/29
- [PULL 35/46] hw/arm/mps2-tz: Create and connect ARMSSE Clocks, Peter Maydell, 2021/01/29
- [PULL 37/46] hw/arm/stellaris: Convert SSYS to QOM device, Peter Maydell, 2021/01/29
- [PULL 46/46] hw/arm/stellaris: Remove board-creation reset of STELLARIS_SYS, Peter Maydell, 2021/01/29
- [PULL 39/46] hw/timer/cmsdk-apb-timer: Convert to use Clock input, Peter Maydell, 2021/01/29
- [PULL 43/46] hw/arm/armsse: Use Clock to set system_clock_scale, Peter Maydell, 2021/01/29
- Re: [PULL 00/46] target-arm queue, no-reply, 2021/01/29