[root@localhost pcm]# ./pcm-memory.x Processor Counter Monitor: Memory Bandwidth Monitoring Utility ($Format:%ci ID=%h$) This utility measures memory bandwidth per channel or per DIMM rank in real-time Detected a hypervisor/virtualization technology. Some metrics might not be available due to configuration or availability of virtual hardware features. Linux arch_perfmon flag : yes IBRS and IBPB supported : yes STIBP supported : no Spec arch caps supported : yes INFO: Reducing the number of programmable counters to 3 to workaround the fixed cycle counter virtualization issue on AWS. You can disable the workaround by setting PCM_NO_AWS_WORKAROUND=1 environment variable Number of physical cores: 18 Number of logical cores: 18 Number of online logical cores: 18 Threads (logical cores) per physical core: 1 Num sockets: 18 Physical cores per socket: 1 Core PMU (perfmon) version: 2 Number of core PMU generic (programmable) counters: 3 Width of generic (programmable) counters: 48 bits Number of core PMU fixed counters: 3 Width of fixed counters: 48 bits Nominal core frequency: 2100000000 Hz IBRS enabled in the kernel : yes STIBP enabled in the kernel : no The processor is not susceptible to Rogue Data Cache Load: yes The processor supports enhanced IBRS : yes Package thermal spec power: 0 Watt; Package minimum power: 0 Watt; Package maximum power: 0 Watt; Can't open MCFG table. Check permission of /sys/firmware/acpi/tables/MCFG Can't open MCFG table. Check permission of /sys/firmware/acpi/tables/MCFG1 Can't open MCFG table. Check permission of /pcm/sys/firmware/acpi/tables/MCFG Can't open MCFG table. Check permission of /pcm/sys/firmware/acpi/tables/MCFG1 Can not access server uncore PCI configuration space. Access to uncore counters (memory and QPI bandwidth) is disabled. You must be root to access server uncore counters in PCM. Detected Intel(R) Xeon(R) Gold 6238M CPU @ 2.10GHz "Intel(r) microarchitecture codename Cascade Lake-SP" stepping 7 microcode level 0x1 Access to Processor Counter Monitor has denied (no MSR or PCI CFG space access). Cleaning up Zeroed uncore PMU registers