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Re: [PATCH] arm: xlnx-versal: fix virtio-mmio base address assignment

From: Peter Maydell
Subject: Re: [PATCH] arm: xlnx-versal: fix virtio-mmio base address assignment
Date: Fri, 5 Feb 2021 10:03:52 +0000

On Fri, 5 Feb 2021 at 07:53, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
> Indeed, you found a design issue IMO:
> Versal creates the "mr-ps-switch" to be explicitly different from
> the main sysbus memory. TYPE_VIRTIO_MMIO is a SYSBUS device, thus
> can not be created without being plugged on sysbus.
> We want TYPE_VIRTIO_MMIO to be TYPE_USER_CREATABLE so we can create
> it on the command line (like your usage). TYPE_SYSBUS allows such
> automatic plug it on the main bus, but also maps to main memory.

That was never the design intent for the virtio mmio transport.
The idea was that the board creates a bunch of transports
(unconditionally). The user then uses command line options
to create virtio backends (blk, net, etc) which get plugged
into the virtio-bus buses that each transport has.

virtio-mmio is not user-creatable for the same reason that
all devices with MMIO memory regions and IRQ lines are not
user-creatable -- there's no good command line syntax for
the user to wire them up, and we don't want the user to have
to know "on this board address 0x50003000 is a good place to
put a device, and irq 43 is free".

-- PMM

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