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[PATCH v2 30/42] esp: add 4 byte PDMA read and write transfers
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From: |
Mark Cave-Ayland |
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Subject: |
[PATCH v2 30/42] esp: add 4 byte PDMA read and write transfers |
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Date: |
Tue, 9 Feb 2021 19:30:06 +0000 |
The MacOS toolbox ROM performs 4 byte reads/writes when transferring data to
and from the target. Since the SCSI bus is 16-bits wide, use the memory API
to split a 4 byte access into 2 x 2 byte accesses.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
hw/scsi/esp.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
index 7671cc398d..1d56c99527 100644
--- a/hw/scsi/esp.c
+++ b/hw/scsi/esp.c
@@ -1003,7 +1003,9 @@ static const MemoryRegionOps sysbus_esp_pdma_ops = {
.write = sysbus_esp_pdma_write,
.endianness = DEVICE_NATIVE_ENDIAN,
.valid.min_access_size = 1,
- .valid.max_access_size = 2,
+ .valid.max_access_size = 4,
+ .impl.min_access_size = 1,
+ .impl.max_access_size = 2,
};
static const struct SCSIBusInfo esp_scsi_info = {
@@ -1048,7 +1050,7 @@ static void sysbus_esp_realize(DeviceState *dev, Error
**errp)
sysbus, "esp-regs", ESP_REGS << sysbus->it_shift);
sysbus_init_mmio(sbd, &sysbus->iomem);
memory_region_init_io(&sysbus->pdma, OBJECT(sysbus), &sysbus_esp_pdma_ops,
- sysbus, "esp-pdma", 2);
+ sysbus, "esp-pdma", 4);
sysbus_init_mmio(sbd, &sysbus->pdma);
qdev_init_gpio_in(dev, sysbus_esp_gpio_demux, 2);
--
2.20.1
- [PATCH v2 24/42] esp: use in-built TC to determine PDMA transfer length, (continued)
- [PATCH v2 24/42] esp: use in-built TC to determine PDMA transfer length, Mark Cave-Ayland, 2021/02/09
- [PATCH v2 22/42] esp: move PDMA length adjustments into esp_pdma_read()/esp_pdma_write(), Mark Cave-Ayland, 2021/02/09
- [PATCH v2 23/42] esp: use ti_wptr/ti_rptr to manage the current FIFO position for PDMA, Mark Cave-Ayland, 2021/02/09
- [PATCH v2 25/42] esp: remove CMD pdma_origin, Mark Cave-Ayland, 2021/02/09
- [PATCH v2 26/42] esp: rename get_cmd_cb() to esp_select(), Mark Cave-Ayland, 2021/02/09
- [PATCH v2 27/42] esp: fix PDMA target selection, Mark Cave-Ayland, 2021/02/09
- [PATCH v2 28/42] esp: use FIFO for PDMA transfers between initiator and device, Mark Cave-Ayland, 2021/02/09
- [PATCH v2 29/42] esp: remove pdma_origin from ESPState, Mark Cave-Ayland, 2021/02/09
- [PATCH v2 30/42] esp: add 4 byte PDMA read and write transfers,
Mark Cave-Ayland <=
- Re: [PATCH v2 30/42] esp: add 4 byte PDMA read and write transfers, Philippe Mathieu-Daudé, 2021/02/12
- Re: [PATCH v2 30/42] esp: add 4 byte PDMA read and write transfers, Mark Cave-Ayland, 2021/02/15
- Re: [PATCH v2 30/42] esp: add 4 byte PDMA read and write transfers, Philippe Mathieu-Daudé, 2021/02/16
- Re: [PATCH v2 30/42] esp: add 4 byte PDMA read and write transfers, Mark Cave-Ayland, 2021/02/16
- Re: [PATCH v2 30/42] esp: add 4 byte PDMA read and write transfers, Mark Cave-Ayland, 2021/02/23
- Re: [PATCH v2 30/42] esp: add 4 byte PDMA read and write transfers, Philippe Mathieu-Daudé, 2021/02/23
[PATCH v2 31/42] esp: implement FIFO flush command, Mark Cave-Ayland, 2021/02/09
[PATCH v2 32/42] esp: latch individual bits in ESP_RINTR register, Mark Cave-Ayland, 2021/02/09
[PATCH v2 34/42] esp: remove old deferred command completion mechanism, Mark Cave-Ayland, 2021/02/09
[PATCH v2 33/42] esp: defer command completion interrupt on incoming data transfers, Mark Cave-Ayland, 2021/02/09