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Re: [PATCH v3 3/5] hw/arm: xlnx-zynqmp: Add XLNX CSU DMA module
From: |
Edgar E. Iglesias |
Subject: |
Re: [PATCH v3 3/5] hw/arm: xlnx-zynqmp: Add XLNX CSU DMA module |
Date: |
Wed, 10 Feb 2021 12:38:21 +0100 |
On Wed, Feb 10, 2021 at 06:10:11PM +0800, Bin Meng wrote:
> From: Xuzhou Cheng <xuzhou.cheng@windriver.com>
>
> Insert XLNX CSU DMA module to ZynqMP SoC, and connent the stream
> link of GQSPI to CSU DMA.
>
> Signed-off-by: Xuzhou Cheng <xuzhou.cheng@windriver.com>
> Signed-off-by: Bin Meng <bin.meng@windriver.com>
>
> ---
>
> Changes in v3:
> - new patch: xlnx-zynqmp: Add XLNX CSU DMA module
>
> include/hw/arm/xlnx-zynqmp.h | 2 ++
> hw/arm/xlnx-zynqmp.c | 14 ++++++++++++++
> hw/arm/Kconfig | 1 +
> 3 files changed, 17 insertions(+)
>
> diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h
> index be15cc8..d387c85 100644
> --- a/include/hw/arm/xlnx-zynqmp.h
> +++ b/include/hw/arm/xlnx-zynqmp.h
> @@ -35,6 +35,7 @@
> #include "target/arm/cpu.h"
> #include "qom/object.h"
> #include "net/can_emu.h"
> +#include "hw/dma/xlnx_csu_dma.h"
>
> #define TYPE_XLNX_ZYNQMP "xlnx,zynqmp"
> OBJECT_DECLARE_SIMPLE_TYPE(XlnxZynqMPState, XLNX_ZYNQMP)
> @@ -108,6 +109,7 @@ struct XlnxZynqMPState {
> XlnxZynqMPRTC rtc;
> XlnxZDMA gdma[XLNX_ZYNQMP_NUM_GDMA_CH];
> XlnxZDMA adma[XLNX_ZYNQMP_NUM_ADMA_CH];
> + XlnxCSUDMA csu_dma;
This should be named in relation to QSPI, e.g qspi_dma.
Otherwise, this looks good to me.
>
> char *boot_cpu;
> ARMCPU *boot_cpu_ptr;
> diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
> index 76b94a5..ed34692 100644
> --- a/hw/arm/xlnx-zynqmp.c
> +++ b/hw/arm/xlnx-zynqmp.c
> @@ -63,6 +63,9 @@
> #define RTC_ADDR 0xffa60000
> #define RTC_IRQ 26
>
> +#define CSU_DMA_ADDR 0xff0f0800
> +#define CSU_DMA_IRQ 15
> +
> #define SDHCI_CAPABILITIES 0x280737ec6481 /* Datasheet: UG1085 (v1.7) */
>
> static const uint64_t gem_addr[XLNX_ZYNQMP_NUM_GEMS] = {
> @@ -284,6 +287,8 @@ static void xlnx_zynqmp_init(Object *obj)
> for (i = 0; i < XLNX_ZYNQMP_NUM_ADMA_CH; i++) {
> object_initialize_child(obj, "adma[*]", &s->adma[i], TYPE_XLNX_ZDMA);
> }
> +
> + object_initialize_child(obj, "csu-dma", &s->csu_dma, TYPE_XLNX_CSU_DMA);
> }
>
> static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
> @@ -643,6 +648,15 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error
> **errp)
> sysbus_connect_irq(SYS_BUS_DEVICE(&s->adma[i]), 0,
> gic_spi[adma_ch_intr[i]]);
> }
> +
> + if (!sysbus_realize(SYS_BUS_DEVICE(&s->csu_dma), errp)) {
> + return;
> + }
> +
> + sysbus_mmio_map(SYS_BUS_DEVICE(&s->csu_dma), 0, CSU_DMA_ADDR);
> + sysbus_connect_irq(SYS_BUS_DEVICE(&s->csu_dma), 0, gic_spi[CSU_DMA_IRQ]);
> + object_property_set_link(OBJECT(&s->qspi), "stream-connected-dma",
> + OBJECT(&s->csu_dma), errp);
> }
>
> static Property xlnx_zynqmp_props[] = {
> diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
> index be017b9..0c0384c 100644
> --- a/hw/arm/Kconfig
> +++ b/hw/arm/Kconfig
> @@ -353,6 +353,7 @@ config XLNX_ZYNQMP_ARM
> select SSI_M25P80
> select XILINX_AXI
> select XILINX_SPIPS
> + select XLNX_CSU_DMA
> select XLNX_ZYNQMP
> select XLNX_ZDMA
>
> --
> 2.7.4
>
- [PATCH v3 0/5] hw/arm: zynqmp: Implement a CSU DMA model and connect it with GQSPI, Bin Meng, 2021/02/10
- [PATCH v3 1/5] hw/dma: xlnx_csu_dma: Implement a basic XLNX CSU DMA model, Bin Meng, 2021/02/10
- [PATCH v3 2/5] hw/arm: xlnx-zynqmp: Clean up coding convention issues, Bin Meng, 2021/02/10
- [PATCH v3 3/5] hw/arm: xlnx-zynqmp: Add XLNX CSU DMA module, Bin Meng, 2021/02/10
- Re: [PATCH v3 3/5] hw/arm: xlnx-zynqmp: Add XLNX CSU DMA module,
Edgar E. Iglesias <=
- [PATCH v3 4/5] hw/ssi: xilinx_spips: Clean up coding convention issues, Bin Meng, 2021/02/10
- [PATCH v3 5/5] hw/ssi: xilinx_spips: Remove DMA related code from zynqmp_qspips, Bin Meng, 2021/02/10