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From: | Richard Henderson |
Subject: | Re: [PATCH v2 16/21] accel/tcg: actually cache our partial icount TB |
Date: | Thu, 11 Feb 2021 10:48:49 -0800 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 |
On 2/10/21 2:10 PM, Alex Bennée wrote: > When we exit a block under icount with instructions left to execute we > might need a shorter than normal block to take us to the next > deterministic event. Instead of creating a throwaway block on demand > we use the existing compile flags mechanism to ensure we fetch (or > compile and fetch) a block with exactly the number of instructions we > need. > > Signed-off-by: Alex Bennée <alex.bennee@linaro.org> > Message-Id: <20210209182749.31323-8-alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
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