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[PATCH v2 08/24] hw/arm/mps2-tz: Condition IRQ splitting on number of CP
From: |
Peter Maydell |
Subject: |
[PATCH v2 08/24] hw/arm/mps2-tz: Condition IRQ splitting on number of CPUs, not board type |
Date: |
Mon, 15 Feb 2021 11:51:22 +0000 |
In the mps2-tz board code, we handle devices whose interrupt lines
must be wired to all CPUs by creating IRQ splitter devices for the
AN521, because it has 2 CPUs, but wiring the device IRQ directly to
the SSE/IoTKit input for the AN505, which has only 1 CPU.
We can avoid making an explicit check on the board type constant by
instead creating and using the IRQ splitters for any board with more
than 1 CPU. This avoids having to add extra cases to the
conditionals every time we add new boards.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
This removes the only current user of mmc->fpga_type, but we're
going to want it again later in the series.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/arm/mps2-tz.c | 19 +++++++++----------
1 file changed, 9 insertions(+), 10 deletions(-)
diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
index 6e345cf1f09..5561c30b126 100644
--- a/hw/arm/mps2-tz.c
+++ b/hw/arm/mps2-tz.c
@@ -139,17 +139,14 @@ static void make_ram_alias(MemoryRegion *mr, const char
*name,
static qemu_irq get_sse_irq_in(MPS2TZMachineState *mms, int irqno)
{
/* Return a qemu_irq which will signal IRQ n to all CPUs in the SSE. */
- MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_GET_CLASS(mms);
+ MachineClass *mc = MACHINE_GET_CLASS(mms);
assert(irqno < MPS2TZ_NUMIRQ);
- switch (mmc->fpga_type) {
- case FPGA_AN505:
- return qdev_get_gpio_in_named(DEVICE(&mms->iotkit), "EXP_IRQ", irqno);
- case FPGA_AN521:
+ if (mc->max_cpus > 1) {
return qdev_get_gpio_in(DEVICE(&mms->cpu_irq_splitter[irqno]), 0);
- default:
- g_assert_not_reached();
+ } else {
+ return qdev_get_gpio_in_named(DEVICE(&mms->iotkit), "EXP_IRQ", irqno);
}
}
@@ -437,10 +434,12 @@ static void mps2tz_common_init(MachineState *machine)
sysbus_realize(SYS_BUS_DEVICE(&mms->iotkit), &error_fatal);
/*
- * The AN521 needs us to create splitters to feed the IRQ inputs
- * for each CPU in the SSE-200 from each device in the board.
+ * If this board has more than one CPU, then we need to create splitters
+ * to feed the IRQ inputs for each CPU in the SSE from each device in the
+ * board. If there is only one CPU, we can just wire the device IRQ
+ * directly to the SSE's IRQ input.
*/
- if (mmc->fpga_type == FPGA_AN521) {
+ if (mc->max_cpus > 1) {
for (i = 0; i < MPS2TZ_NUMIRQ; i++) {
char *name = g_strdup_printf("mps2-irq-splitter%d", i);
SplitIRQ *splitter = &mms->cpu_irq_splitter[i];
--
2.20.1
- [PATCH v2 03/24] hw/arm/mps2-tz: Correct the OSCCLK settings for mps2-an505 and mps2-an511, (continued)
- [PATCH v2 03/24] hw/arm/mps2-tz: Correct the OSCCLK settings for mps2-an505 and mps2-an511, Peter Maydell, 2021/02/15
- [PATCH v2 04/24] hw/arm/mps2-tz: Make the OSCCLK settings be configurable per-board, Peter Maydell, 2021/02/15
- [PATCH v2 05/24] hw/misc/mps2-fpgaio: Make number of LEDs configurable by board, Peter Maydell, 2021/02/15
- [PATCH v2 06/24] hw/misc/mps2-fpgaio: Support SWITCH register, Peter Maydell, 2021/02/15
- [PATCH v2 07/24] hw/arm/mps2-tz: Make FPGAIO switch and LED config per-board, Peter Maydell, 2021/02/15
- [PATCH v2 08/24] hw/arm/mps2-tz: Condition IRQ splitting on number of CPUs, not board type,
Peter Maydell <=
- [PATCH v2 09/24] hw/arm/mps2-tz: Make number of IRQs board-specific, Peter Maydell, 2021/02/15
- [PATCH v2 10/24] hw/misc/mps2-scc: Implement CFG_REG5 and CFG_REG6 for MPS3 AN524, Peter Maydell, 2021/02/15
- [PATCH v2 11/24] hw/arm/mps2-tz: Correct wrong interrupt numbers for DMA and SPI, Peter Maydell, 2021/02/15
- [PATCH v2 12/24] hw/arm/mps2-tz: Allow PPCPortInfo structures to specify device interrupts, Peter Maydell, 2021/02/15
- [PATCH v2 13/24] hw/arm/mps2-tz: Move device IRQ info to data structures, Peter Maydell, 2021/02/15