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Re: [PATCH v3 0/5] hw/i2c: Add NPCM7XX SMBus Device
From: |
Peter Maydell |
Subject: |
Re: [PATCH v3 0/5] hw/i2c: Add NPCM7XX SMBus Device |
Date: |
Tue, 16 Feb 2021 14:15:56 +0000 |
On Wed, 10 Feb 2021 at 22:04, Hao Wu <wuhaotsh@google.com> wrote:
>
> This patch set implements the System manager bus (SMBus) module in NPCM7XX
> SoC. Basically, it emulates the data transactions of the module, not the
> SDA/SCL levels. We have also added a QTest which contains read and write
> operations for both single-byte and FIFO mode, and added basic I2C devices
> for npcm750-evb and quanta-gsj boards.
Applied to target-arm.next, thanks.
-- PMM
- [PATCH v3 0/5] hw/i2c: Add NPCM7XX SMBus Device, Hao Wu, 2021/02/10
- [PATCH v3 1/5] hw/i2c: Implement NPCM7XX SMBus Module Single Mode, Hao Wu, 2021/02/10
- [PATCH v3 3/5] hw/arm: Add I2C sensors and EEPROM for GSJ machine, Hao Wu, 2021/02/10
- [PATCH v3 2/5] hw/arm: Add I2C sensors for NPCM750 eval board, Hao Wu, 2021/02/10
- [PATCH v3 4/5] hw/i2c: Add a QTest for NPCM7XX SMBus Device, Hao Wu, 2021/02/10
- [PATCH v3 5/5] hw/i2c: Implement NPCM7XX SMBus Module FIFO Mode, Hao Wu, 2021/02/10
- Re: [PATCH v3 0/5] hw/i2c: Add NPCM7XX SMBus Device,
Peter Maydell <=