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[PULL 10/19] hw/riscv: sifive_u: Change SIFIVE_U_GEM_IRQ to decimal valu
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From: |
Alistair Francis |
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Subject: |
[PULL 10/19] hw/riscv: sifive_u: Change SIFIVE_U_GEM_IRQ to decimal value |
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Date: |
Wed, 17 Feb 2021 17:59:25 -0800 |
From: Bin Meng <bin.meng@windriver.com>
All other peripherals' IRQs are in the format of decimal value.
Change SIFIVE_U_GEM_IRQ to be consistent.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20210126060007.12904-7-bmeng.cn@gmail.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
include/hw/riscv/sifive_u.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/hw/riscv/sifive_u.h b/include/hw/riscv/sifive_u.h
index de1464a2ce..2656b39808 100644
--- a/include/hw/riscv/sifive_u.h
+++ b/include/hw/riscv/sifive_u.h
@@ -127,7 +127,7 @@ enum {
SIFIVE_U_PDMA_IRQ6 = 29,
SIFIVE_U_PDMA_IRQ7 = 30,
SIFIVE_U_QSPI0_IRQ = 51,
- SIFIVE_U_GEM_IRQ = 0x35
+ SIFIVE_U_GEM_IRQ = 53
};
enum {
--
2.30.0
- [PULL 00/19] riscv-to-apply queue, Alistair Francis, 2021/02/17
- [PULL 01/19] target/riscv: Declare csr_ops[] with a known size, Alistair Francis, 2021/02/17
- [PULL 02/19] hw/misc: sifive_u_otp: Use error_report() when block operation fails, Alistair Francis, 2021/02/17
- [PULL 05/19] hw/block: m25p80: Add ISSI SPI flash support, Alistair Francis, 2021/02/17
- [PULL 04/19] target-riscv: support QMP dump-guest-memory, Alistair Francis, 2021/02/17
- [PULL 07/19] hw/ssi: Add SiFive SPI controller support, Alistair Francis, 2021/02/17
- [PULL 06/19] hw/block: m25p80: Add various ISSI flash information, Alistair Francis, 2021/02/17
- [PULL 03/19] roms/opensbi: Upgrade from v0.8 to v0.9, Alistair Francis, 2021/02/17
- [PULL 08/19] hw/riscv: sifive_u: Add QSPI0 controller and connect a flash, Alistair Francis, 2021/02/17
- [PULL 09/19] hw/riscv: sifive_u: Add QSPI2 controller and connect an SD card, Alistair Francis, 2021/02/17
- [PULL 10/19] hw/riscv: sifive_u: Change SIFIVE_U_GEM_IRQ to decimal value,
Alistair Francis <=
- [PULL 11/19] docs/system: Sort targets in alphabetical order, Alistair Francis, 2021/02/17
- [PULL 13/19] docs/system: riscv: Add documentation for sifive_u machine, Alistair Francis, 2021/02/17
- [PULL 12/19] docs/system: Add RISC-V documentation, Alistair Francis, 2021/02/17
- [PULL 14/19] goldfish_rtc: re-arm the alarm after migration, Alistair Francis, 2021/02/17
- [PULL 15/19] MAINTAINERS: Add a SiFive machine section, Alistair Francis, 2021/02/17
- [PULL 16/19] hw/riscv: Drop 'struct MemmapEntry', Alistair Francis, 2021/02/17
- [PULL 17/19] hw/riscv: virt: Drop the 'link_up' parameter of gpex_pcie_init(), Alistair Francis, 2021/02/17
- [PULL 18/19] hw/riscv: virt: Limit RAM size in a 32-bit system, Alistair Francis, 2021/02/17
- [PULL 19/19] hw/riscv: virt: Map high mmio for PCIe, Alistair Francis, 2021/02/17
- Re: [PULL 00/19] riscv-to-apply queue, Peter Maydell, 2021/02/18