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[PATCH 4/5] tcg/tci: Merge identical cases in generation (conditional op
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH 4/5] tcg/tci: Merge identical cases in generation (conditional opcodes) |
Date: |
Fri, 19 Feb 2021 00:28:39 +0100 |
From: Richard Henderson <richard.henderson@linaro.org>
Use CASE_32_64 and CASE_64 to reduce ifdefs and merge
cases that are identical between 32-bit and 64-bit hosts.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210217202036.1724901-5-richard.henderson@linaro.org>
[PMD: Split patch as 4/5]
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
tcg/tci/tcg-target.c.inc | 23 ++++++-----------------
1 file changed, 6 insertions(+), 17 deletions(-)
diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc
index 4a86a3bb466..f9893b9539e 100644
--- a/tcg/tci/tcg-target.c.inc
+++ b/tcg/tci/tcg-target.c.inc
@@ -417,15 +417,18 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
const TCGArg *args,
}
set_jmp_reset_offset(s, args[0]);
break;
+
case INDEX_op_br:
tci_out_label(s, arg_label(args[0]));
break;
- case INDEX_op_setcond_i32:
+
+ CASE_32_64(setcond)
tcg_out_r(s, args[0]);
tcg_out_r(s, args[1]);
tcg_out_r(s, args[2]);
tcg_out8(s, args[3]); /* condition */
break;
+
#if TCG_TARGET_REG_BITS == 32
case INDEX_op_setcond2_i32:
/* setcond2_i32 cond, t0, t1_low, t1_high, t2_low, t2_high */
@@ -436,13 +439,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const
TCGArg *args,
tcg_out_r(s, args[4]);
tcg_out8(s, args[5]); /* condition */
break;
-#elif TCG_TARGET_REG_BITS == 64
- case INDEX_op_setcond_i64:
- tcg_out_r(s, args[0]);
- tcg_out_r(s, args[1]);
- tcg_out_r(s, args[2]);
- tcg_out8(s, args[3]); /* condition */
- break;
#endif
case INDEX_op_ld8u_i32:
case INDEX_op_ld8s_i32:
@@ -505,14 +501,12 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
const TCGArg *args,
tcg_out8(s, args[4]);
break;
-#if TCG_TARGET_REG_BITS == 64
- case INDEX_op_brcond_i64:
+ CASE_32_64(brcond)
tcg_out_r(s, args[0]);
tcg_out_r(s, args[1]);
tcg_out8(s, args[2]); /* condition */
tci_out_label(s, arg_label(args[3]));
break;
-#endif /* TCG_TARGET_REG_BITS == 64 */
CASE_32_64(neg) /* Optional (TCG_TARGET_HAS_neg_*). */
CASE_32_64(not) /* Optional (TCG_TARGET_HAS_not_*). */
@@ -556,12 +550,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const
TCGArg *args,
tcg_out_r(s, args[3]);
break;
#endif
- case INDEX_op_brcond_i32:
- tcg_out_r(s, args[0]);
- tcg_out_r(s, args[1]);
- tcg_out8(s, args[2]); /* condition */
- tci_out_label(s, arg_label(args[3]));
- break;
+
case INDEX_op_qemu_ld_i32:
tcg_out_r(s, *args++);
tcg_out_r(s, *args++);
--
2.26.2
- [PATCH 0/5] tcg/tci: Merge identical cases in generation, Philippe Mathieu-Daudé, 2021/02/18
- [PATCH 2/5] tcg/tci: Merge identical cases in generation (exchange opcodes), Philippe Mathieu-Daudé, 2021/02/18
- [PATCH 1/5] tcg/tci: Merge identical cases in generation (arithmetic opcodes), Philippe Mathieu-Daudé, 2021/02/18
- [PATCH 3/5] tcg/tci: Merge identical cases in generation (deposit opcode), Philippe Mathieu-Daudé, 2021/02/18
- [PATCH 4/5] tcg/tci: Merge identical cases in generation (conditional opcodes),
Philippe Mathieu-Daudé <=
- [PATCH 5/5] tcg/tci: Merge identical cases in generation (load/store opcodes), Philippe Mathieu-Daudé, 2021/02/18
- Re: [PATCH 0/5] tcg/tci: Merge identical cases in generation, Richard Henderson, 2021/02/28