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[PATCH 07/44] hw/misc/iotkit-secctl.c: Implement SSE-300 PID register va
From: |
Peter Maydell |
Subject: |
[PATCH 07/44] hw/misc/iotkit-secctl.c: Implement SSE-300 PID register values |
Date: |
Fri, 19 Feb 2021 14:45:40 +0000 |
The versions of the Secure Access Configuration Register Block
and Non-secure Access Configuration Register Block in the SSE-300
are the same as those in the SSE-200, but the CIDR/PIDR ID
register values are different.
Plumb through the sse-version property and use it to select
the correct ID register values.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
include/hw/misc/iotkit-secctl.h | 2 ++
hw/arm/armsse.c | 2 ++
hw/misc/iotkit-secctl.c | 50 +++++++++++++++++++++++++++++++--
3 files changed, 52 insertions(+), 2 deletions(-)
diff --git a/include/hw/misc/iotkit-secctl.h b/include/hw/misc/iotkit-secctl.h
index 227d44abe49..79a36283201 100644
--- a/include/hw/misc/iotkit-secctl.h
+++ b/include/hw/misc/iotkit-secctl.h
@@ -120,6 +120,8 @@ struct IoTKitSecCtl {
IoTKitSecCtlPPC apb[IOTS_NUM_APB_PPC];
IoTKitSecCtlPPC apbexp[IOTS_NUM_APB_EXP_PPC];
IoTKitSecCtlPPC ahbexp[IOTS_NUM_APB_EXP_PPC];
+
+ uint32_t sse_version;
};
#endif
diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c
index f509f59d4a8..9632c287351 100644
--- a/hw/arm/armsse.c
+++ b/hw/arm/armsse.c
@@ -654,6 +654,8 @@ static void armsse_realize(DeviceState *dev, Error **errp)
}
/* Security controller */
+ object_property_set_int(OBJECT(&s->secctl), "sse-version",
+ info->sse_version, &error_abort);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->secctl), errp)) {
return;
}
diff --git a/hw/misc/iotkit-secctl.c b/hw/misc/iotkit-secctl.c
index 9fdb82056a8..7b41cfa8fc5 100644
--- a/hw/misc/iotkit-secctl.c
+++ b/hw/misc/iotkit-secctl.c
@@ -19,6 +19,8 @@
#include "hw/registerfields.h"
#include "hw/irq.h"
#include "hw/misc/iotkit-secctl.h"
+#include "hw/arm/armsse-version.h"
+#include "hw/qdev-properties.h"
/* Registers in the secure privilege control block */
REG32(SECRESPCFG, 0x10)
@@ -95,6 +97,19 @@ static const uint8_t iotkit_secctl_ns_idregs[] = {
0x0d, 0xf0, 0x05, 0xb1,
};
+static const uint8_t iotkit_secctl_s_sse300_idregs[] = {
+ 0x04, 0x00, 0x00, 0x00,
+ 0x52, 0xb8, 0x2b, 0x00,
+ 0x0d, 0xf0, 0x05, 0xb1,
+};
+
+static const uint8_t iotkit_secctl_ns_sse300_idregs[] = {
+ 0x04, 0x00, 0x00, 0x00,
+ 0x53, 0xb8, 0x2b, 0x00,
+ 0x0d, 0xf0, 0x05, 0xb1,
+};
+
+
/* The register sets for the various PPCs (AHB internal, APB internal,
* AHB expansion, APB expansion) are all set up so that they are
* in 16-aligned blocks so offsets 0xN0, 0xN4, 0xN8, 0xNC are PPCs
@@ -213,7 +228,14 @@ static MemTxResult iotkit_secctl_s_read(void *opaque,
hwaddr addr,
case A_CID1:
case A_CID2:
case A_CID3:
- r = iotkit_secctl_s_idregs[(offset - A_PID4) / 4];
+ switch (s->sse_version) {
+ case ARMSSE_SSE300:
+ r = iotkit_secctl_s_sse300_idregs[(offset - A_PID4) / 4];
+ break;
+ default:
+ r = iotkit_secctl_s_idregs[(offset - A_PID4) / 4];
+ break;
+ }
break;
case A_SECPPCINTCLR:
case A_SECMSCINTCLR:
@@ -473,7 +495,14 @@ static MemTxResult iotkit_secctl_ns_read(void *opaque,
hwaddr addr,
case A_CID1:
case A_CID2:
case A_CID3:
- r = iotkit_secctl_ns_idregs[(offset - A_PID4) / 4];
+ switch (s->sse_version) {
+ case ARMSSE_SSE300:
+ r = iotkit_secctl_ns_sse300_idregs[(offset - A_PID4) / 4];
+ break;
+ default:
+ r = iotkit_secctl_ns_idregs[(offset - A_PID4) / 4];
+ break;
+ }
break;
default:
qemu_log_mask(LOG_GUEST_ERROR,
@@ -710,6 +739,16 @@ static void iotkit_secctl_init(Object *obj)
sysbus_init_mmio(sbd, &s->ns_regs);
}
+static void iotkit_secctl_realize(DeviceState *dev, Error **errp)
+{
+ IoTKitSecCtl *s = IOTKIT_SECCTL(dev);
+
+ if (!armsse_version_valid(s->sse_version)) {
+ error_setg(errp, "invalid sse-version value %d", s->sse_version);
+ return;
+ }
+}
+
static const VMStateDescription iotkit_secctl_ppc_vmstate = {
.name = "iotkit-secctl-ppc",
.version_id = 1,
@@ -775,12 +814,19 @@ static const VMStateDescription iotkit_secctl_vmstate = {
},
};
+static Property iotkit_secctl_props[] = {
+ DEFINE_PROP_UINT32("sse-version", IoTKitSecCtl, sse_version, 0),
+ DEFINE_PROP_END_OF_LIST()
+};
+
static void iotkit_secctl_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &iotkit_secctl_vmstate;
dc->reset = iotkit_secctl_reset;
+ dc->realize = iotkit_secctl_realize;
+ device_class_set_props(dc, iotkit_secctl_props);
}
static const TypeInfo iotkit_secctl_info = {
--
2.20.1
- [PATCH 00/44] hw/arm: New board model mps3-an547, Peter Maydell, 2021/02/19
- [PATCH 01/44] clock: Add ClockEvent parameter to callbacks, Peter Maydell, 2021/02/19
- [PATCH 04/44] hw/timer/npcm7xx_timer: Use new clock_ns_to_ticks(), Peter Maydell, 2021/02/19
- [PATCH 02/44] clock: Add ClockPreUpdate callback event type, Peter Maydell, 2021/02/19
- [PATCH 03/44] clock: Add clock_ns_to_ticks() function, Peter Maydell, 2021/02/19
- [PATCH 06/44] hw/misc/iotkit-sysctl: Remove is_sse200 flag, Peter Maydell, 2021/02/19
- [PATCH 07/44] hw/misc/iotkit-secctl.c: Implement SSE-300 PID register values,
Peter Maydell <=
- [PATCH 11/44] hw/timer/sse-counter: Model the SSE Subsystem System Counter, Peter Maydell, 2021/02/19
- [PATCH 10/44] hw/misc/iotkit-sysinfo.c: Implement SYS_CONFIG1 and IIDR, Peter Maydell, 2021/02/19
- [PATCH 05/44] hw/arm/armsse: Introduce SSE subsystem version property, Peter Maydell, 2021/02/19
- [PATCH 08/44] hw/misc/iotkit-sysinfo.c: Implement SSE-300 PID register values, Peter Maydell, 2021/02/19
- [PATCH 09/44] hw/arm/armsse.c: Use correct SYS_CONFIG0 register value for SSE-300, Peter Maydell, 2021/02/19
- [PATCH 12/44] hw/timer/sse-timer: Model the SSE Subsystem System Timer, Peter Maydell, 2021/02/19
- [PATCH 15/44] hw/misc/iotkit-sysctl: Handle INITSVTOR* for SSE-300, Peter Maydell, 2021/02/19
- [PATCH 17/44] hw/misc/iotkit-sysctl: Handle SSE-300 changes to PDCM_PD_*_SENSE registers, Peter Maydell, 2021/02/19
- [PATCH 16/44] hw/misc/iotkit-sysctl: Implement dummy version of SSE-300 PWRCTRL register, Peter Maydell, 2021/02/19
- [PATCH 20/44] hw/misc/sse-cpu-pwrctrl: Implement SSE-300 CPU<N>_PWRCTRL register block, Peter Maydell, 2021/02/19