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[PULL 00/43] MIPS patches for 2021-02-21
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 00/43] MIPS patches for 2021-02-21 |
Date: |
Sun, 21 Feb 2021 15:33:49 +0100 |
The following changes since commit a528b8c4c638d60cc474c2f80952ff0f2e60521a:
Merge remote-tracking branch 'remotes/philmd-gitlab/tags/sdmmc-20210220' into
staging (2021-02-20 19:28:27 +0000)
are available in the Git repository at:
https://gitlab.com/philmd/qemu.git tags/mips-20210221
for you to fetch changes up to 98e7c7108127bc9f2bf9065cbddd25778025b9c6:
vt82c686: Fix superio_cfg_{read,write}() functions (2021-02-21 15:28:52 +0100)
----------------------------------------------------------------
MIPS patches queue
- Drop redundant struct MemmapEntry (Bin)
- Fix for Coverity CID 1438965 and 1438967 (Jiaxun)
- Add MIPS bootloader API (Jiaxun)
- Use MIPS bootloader API on fuloong2e and boston machines (Jiaxun)
- Add PMON test for Loongson-3A1000 CPU (Jiaxun)
- Convert to translator API (Philippe)
- MMU cleanups (Philippe)
- Promote 128-bit multimedia registers as global ones (Philippe)
- Various cleanups/fixes on the VT82C686B southbridge (Zoltan)
----------------------------------------------------------------
BALATON Zoltan (16):
vt82c686: Move superio memory region to SuperIOConfig struct
vt82c686: Reorganise code
vt82c686: Fix SMBus IO base and configuration registers
vt82c686: Make vt82c686-pm an I/O tracing region
vt82c686: Correct vt82c686-pm I/O size
vt82c686: Correctly reset all registers to default values on reset
vt82c686: Fix up power management io base and config
vt82c686: Set user_creatable=false for VT82C686B_PM
vt82c686: Make vt82c686b-pm an abstract base class and add vt8231-pm
based on it
vt82c686: Simplify vt82c686b_realize()
vt82c686: Move creation of ISA devices to the ISA bridge
vt82c686: Remove index field of SuperIOConfig
vt82c686: Reduce indentation by returning early
vt82c686: Simplify by returning earlier
vt82c686: Log superio_cfg unimplemented accesses
vt82c686: Fix superio_cfg_{read,write}() functions
Bin Meng (1):
hw/mips: loongson3: Drop 'struct MemmapEntry'
Jiaxun Yang (6):
hw/mips: Add a bootloader helper
hw/mips/fuloong2e: Use bl_gen_kernel_jump to generate bootloaders
hw/mips/boston: Use bl_gen_kernel_jump to generate bootloaders
hw/mips/boston: Use bootloader helper to set GCRs
hw/intc/loongson_liointc: Fix per core ISR handling
tests/acceptance: Test PMON with Loongson-3A1000 CPU
Philippe Mathieu-Daudé (20):
target/mips: fetch code with translator_ld
target/mips: Remove access_type argument from map_address() handler
target/mips: Remove access_type argument from get_seg_physical_address
target/mips: Remove access_type arg from get_segctl_physical_address()
target/mips: Remove access_type argument from get_physical_address()
target/mips: Remove unused MMU definitions
target/mips: Replace magic value by MMU_DATA_LOAD definition
target/mips: Let do_translate_address() take MMUAccessType argument
target/mips: Let cpu_mips_translate_address() take MMUAccessType arg
target/mips: Let raise_mmu_exception() take MMUAccessType argument
target/mips: Let get_physical_address() take MMUAccessType argument
target/mips: Let get_seg*_physical_address() take MMUAccessType arg
target/mips: Let CPUMIPSTLBContext::map_address() take MMUAccessType
target/mips: Remove unused 'rw' argument from page_table_walk_refill()
target/mips: Include missing "tcg/tcg.h" header
target/mips: Make cpu_HI/LO registers public
target/mips: Promote 128-bit multimedia registers as global ones
target/mips: Rename 128-bit upper halve GPR registers
target/mips: Introduce gen_load_gpr_hi() / gen_store_gpr_hi() helpers
target/mips: Use GPR move functions in gen_HILO1_tx79()
hw/mips/loongson3_bootp.h | 7 +-
include/hw/isa/vt82c686.h | 1 +
include/hw/mips/bootloader.h | 14 +
include/hw/pci/pci_ids.h | 3 +-
target/mips/cpu.h | 26 +-
target/mips/internal.h | 10 +-
target/mips/translate.h | 8 +
hw/intc/loongson_liointc.c | 16 +-
hw/isa/vt82c686.c | 542 ++++++++++++--------
hw/mips/bootloader.c | 200 ++++++++
hw/mips/boston.c | 62 +--
hw/mips/fuloong2e.c | 60 +--
hw/mips/loongson3_virt.c | 6 +-
target/mips/msa_helper.c | 1 +
target/mips/op_helper.c | 9 +-
target/mips/tlb_helper.c | 80 ++-
target/mips/translate.c | 111 ++--
MAINTAINERS | 1 +
hw/isa/trace-events | 2 +
hw/mips/meson.build | 2 +-
tests/acceptance/machine_mips_loongson3v.py | 39 ++
21 files changed, 741 insertions(+), 459 deletions(-)
create mode 100644 include/hw/mips/bootloader.h
create mode 100644 hw/mips/bootloader.c
create mode 100644 tests/acceptance/machine_mips_loongson3v.py
--
2.26.2
- [PULL 00/43] MIPS patches for 2021-02-21,
Philippe Mathieu-Daudé <=
- [PULL 01/43] hw/mips: loongson3: Drop 'struct MemmapEntry', Philippe Mathieu-Daudé, 2021/02/21
- [PULL 02/43] hw/mips: Add a bootloader helper, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 03/43] hw/mips/fuloong2e: Use bl_gen_kernel_jump to generate bootloaders, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 05/43] hw/mips/boston: Use bootloader helper to set GCRs, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 06/43] hw/intc/loongson_liointc: Fix per core ISR handling, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 07/43] tests/acceptance: Test PMON with Loongson-3A1000 CPU, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 08/43] target/mips: fetch code with translator_ld, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 04/43] hw/mips/boston: Use bl_gen_kernel_jump to generate bootloaders, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 09/43] target/mips: Remove access_type argument from map_address() handler, Philippe Mathieu-Daudé, 2021/02/21