[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 12/43] target/mips: Remove access_type argument from get_physical_
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 12/43] target/mips: Remove access_type argument from get_physical_address() |
Date: |
Sun, 21 Feb 2021 15:34:01 +0100 |
get_physical_address() doesn't use the 'access_type' argument,
remove it to simplify.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-Id: <20210128144125.3696119-5-f4bug@amsat.org>
---
target/mips/tlb_helper.c | 22 +++++++++-------------
1 file changed, 9 insertions(+), 13 deletions(-)
diff --git a/target/mips/tlb_helper.c b/target/mips/tlb_helper.c
index d89ad87cb9d..c9535b7f72f 100644
--- a/target/mips/tlb_helper.c
+++ b/target/mips/tlb_helper.c
@@ -259,7 +259,7 @@ static int get_segctl_physical_address(CPUMIPSState *env,
hwaddr *physical,
static int get_physical_address(CPUMIPSState *env, hwaddr *physical,
int *prot, target_ulong real_address,
- int rw, int access_type, int mmu_idx)
+ int rw, int mmu_idx)
{
/* User mode can only access useg/xuseg */
#if defined(TARGET_MIPS64)
@@ -492,7 +492,7 @@ hwaddr mips_cpu_get_phys_page_debug(CPUState *cs, vaddr
addr)
hwaddr phys_addr;
int prot;
- if (get_physical_address(env, &phys_addr, &prot, addr, 0, ACCESS_INT,
+ if (get_physical_address(env, &phys_addr, &prot, addr, 0,
cpu_mmu_index(env, false)) != 0) {
return -1;
}
@@ -570,7 +570,7 @@ static int walk_directory(CPUMIPSState *env, uint64_t
*vaddr,
uint64_t w = 0;
if (get_physical_address(env, &paddr, &prot, *vaddr, MMU_DATA_LOAD,
- ACCESS_INT, cpu_mmu_index(env, false)) !=
+ cpu_mmu_index(env, false)) !=
TLBRET_MATCH) {
/* wrong base address */
return 0;
@@ -598,7 +598,7 @@ static int walk_directory(CPUMIPSState *env, uint64_t
*vaddr,
*pw_entrylo0 = entry;
}
if (get_physical_address(env, &paddr, &prot, vaddr2, MMU_DATA_LOAD,
- ACCESS_INT, cpu_mmu_index(env, false)) !=
+ cpu_mmu_index(env, false)) !=
TLBRET_MATCH) {
return 0;
}
@@ -752,7 +752,7 @@ static bool page_table_walk_refill(CPUMIPSState *env, vaddr
address, int rw,
/* Leaf Level Page Table - First half of PTE pair */
vaddr |= ptoffset0;
if (get_physical_address(env, &paddr, &prot, vaddr, MMU_DATA_LOAD,
- ACCESS_INT, cpu_mmu_index(env, false)) !=
+ cpu_mmu_index(env, false)) !=
TLBRET_MATCH) {
return false;
}
@@ -765,7 +765,7 @@ static bool page_table_walk_refill(CPUMIPSState *env, vaddr
address, int rw,
/* Leaf Level Page Table - Second half of PTE pair */
vaddr |= ptoffset1;
if (get_physical_address(env, &paddr, &prot, vaddr, MMU_DATA_LOAD,
- ACCESS_INT, cpu_mmu_index(env, false)) !=
+ cpu_mmu_index(env, false)) !=
TLBRET_MATCH) {
return false;
}
@@ -843,16 +843,14 @@ bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int
size,
#if !defined(CONFIG_USER_ONLY)
hwaddr physical;
int prot;
- int mips_access_type;
#endif
int ret = TLBRET_BADADDR;
/* data access */
#if !defined(CONFIG_USER_ONLY)
/* XXX: put correct access by using cpu_restore_state() correctly */
- mips_access_type = ACCESS_INT;
ret = get_physical_address(env, &physical, &prot, address,
- access_type, mips_access_type, mmu_idx);
+ access_type, mmu_idx);
switch (ret) {
case TLBRET_MATCH:
qemu_log_mask(CPU_LOG_MMU,
@@ -884,7 +882,7 @@ bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int
size,
env->hflags |= mode;
if (ret_walker) {
ret = get_physical_address(env, &physical, &prot, address,
- access_type, mips_access_type, mmu_idx);
+ access_type, mmu_idx);
if (ret == TLBRET_MATCH) {
tlb_set_page(cs, address & TARGET_PAGE_MASK,
physical & TARGET_PAGE_MASK, prot,
@@ -909,12 +907,10 @@ hwaddr cpu_mips_translate_address(CPUMIPSState *env,
target_ulong address,
{
hwaddr physical;
int prot;
- int access_type;
int ret = 0;
/* data access */
- access_type = ACCESS_INT;
- ret = get_physical_address(env, &physical, &prot, address, rw, access_type,
+ ret = get_physical_address(env, &physical, &prot, address, rw,
cpu_mmu_index(env, false));
if (ret != TLBRET_MATCH) {
raise_mmu_exception(env, address, rw, ret);
--
2.26.2
- [PULL 02/43] hw/mips: Add a bootloader helper, (continued)
- [PULL 02/43] hw/mips: Add a bootloader helper, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 03/43] hw/mips/fuloong2e: Use bl_gen_kernel_jump to generate bootloaders, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 05/43] hw/mips/boston: Use bootloader helper to set GCRs, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 06/43] hw/intc/loongson_liointc: Fix per core ISR handling, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 07/43] tests/acceptance: Test PMON with Loongson-3A1000 CPU, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 08/43] target/mips: fetch code with translator_ld, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 04/43] hw/mips/boston: Use bl_gen_kernel_jump to generate bootloaders, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 09/43] target/mips: Remove access_type argument from map_address() handler, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 10/43] target/mips: Remove access_type argument from get_seg_physical_address, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 11/43] target/mips: Remove access_type arg from get_segctl_physical_address(), Philippe Mathieu-Daudé, 2021/02/21
- [PULL 12/43] target/mips: Remove access_type argument from get_physical_address(),
Philippe Mathieu-Daudé <=
- [PULL 13/43] target/mips: Remove unused MMU definitions, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 14/43] target/mips: Replace magic value by MMU_DATA_LOAD definition, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 15/43] target/mips: Let do_translate_address() take MMUAccessType argument, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 16/43] target/mips: Let cpu_mips_translate_address() take MMUAccessType arg, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 17/43] target/mips: Let raise_mmu_exception() take MMUAccessType argument, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 18/43] target/mips: Let get_physical_address() take MMUAccessType argument, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 19/43] target/mips: Let get_seg*_physical_address() take MMUAccessType arg, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 20/43] target/mips: Let CPUMIPSTLBContext::map_address() take MMUAccessType, Philippe Mathieu-Daudé, 2021/02/21
- [PULL 21/43] target/mips: Remove unused 'rw' argument from page_table_walk_refill(), Philippe Mathieu-Daudé, 2021/02/21
- [PULL 22/43] target/mips: Include missing "tcg/tcg.h" header, Philippe Mathieu-Daudé, 2021/02/21