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[PATCH] target/riscv: fix vs() to return proper error code
From: |
frank . chang |
Subject: |
[PATCH] target/riscv: fix vs() to return proper error code |
Date: |
Tue, 23 Feb 2021 14:59:32 +0800 |
From: Frank Chang <frank.chang@sifive.com>
vs() should return -RISCV_EXCP_ILLEGAL_INST instead of -1 if rvv feature
is not enabled.
If -1 is returned, exception will be raised and cs->exception_index will
be set to the negative return value. The exception will then be treated
as an instruction access fault instead of illegal instruction fault.
Signed-off-by: Frank Chang <frank.chang@sifive.com>
---
target/riscv/csr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index fd2e6363f39..d2ae73e4a08 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -54,7 +54,7 @@ static int vs(CPURISCVState *env, int csrno)
if (env->misa & RVV) {
return 0;
}
- return -1;
+ return -RISCV_EXCP_ILLEGAL_INST;
}
static int ctr(CPURISCVState *env, int csrno)
--
2.17.1
- [PATCH] target/riscv: fix vs() to return proper error code,
frank . chang <=