[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH v2 38/42] esp: convert ti_buf from array to Fifo8
From: |
Philippe Mathieu-Daudé |
Subject: |
Re: [PATCH v2 38/42] esp: convert ti_buf from array to Fifo8 |
Date: |
Tue, 23 Feb 2021 19:49:54 +0100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.0 |
On 2/9/21 8:30 PM, Mark Cave-Ayland wrote:
> Rename TI_BUFSZ to ESP_FIFO_SZ since this constant is really describing the
> size
> of the FIFO and is not directly related to the TI size.
>
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> ---
> hw/scsi/esp.c | 117 ++++++++++++++++++++++++++----------------
> include/hw/scsi/esp.h | 8 +--
> 2 files changed, 79 insertions(+), 46 deletions(-)
> @@ -806,11 +818,9 @@ void esp_reg_write(ESPState *s, uint32_t saddr, uint64_t
> val)
> } else {
> trace_esp_error_fifo_overrun();
> }
> - } else if (s->ti_wptr == TI_BUFSZ - 1) {
> - trace_esp_error_fifo_overrun();
> } else {
> s->ti_size++;
> - s->ti_buf[s->ti_wptr++] = val & 0xff;
> + esp_fifo_push(s, val & 0xff);
Personally I'd drop the '& 0xff' part.
> }
>
> /* Non-DMA transfers raise an interrupt after every byte */
> @@ -839,8 +849,7 @@ void esp_reg_write(ESPState *s, uint32_t saddr, uint64_t
> val)
> case CMD_FLUSH:
> trace_esp_mem_writeb_cmd_flush(val);
> /*s->ti_size = 0;*/
Is this comment still meaningful?
> - s->ti_wptr = 0;
> - s->ti_rptr = 0;
> + fifo8_reset(&s->fifo);
> break;
> case CMD_RESET:
> trace_esp_mem_writeb_cmd_reset(val);
> @@ -958,11 +967,18 @@ static int esp_pre_save(void *opaque)
> static int esp_post_load(void *opaque, int version_id)
> {
> ESPState *s = ESP(opaque);
> + int len, i;
>
> version_id = MIN(version_id, s->mig_version_id);
>
> if (version_id < 5) {
> esp_set_tc(s, s->mig_dma_left);
> +
> + /* Migrate ti_buf to fifo */
> + len = s->mig_ti_wptr - s->mig_ti_rptr;
> + for (i = 0; i < len; i++) {
> + fifo8_push(&s->fifo, s->mig_ti_buf[i]);
Again I dare to add:
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> + }
> }
- [PATCH v2 31/42] esp: implement FIFO flush command, (continued)
- [PATCH v2 31/42] esp: implement FIFO flush command, Mark Cave-Ayland, 2021/02/09
- [PATCH v2 32/42] esp: latch individual bits in ESP_RINTR register, Mark Cave-Ayland, 2021/02/09
- [PATCH v2 34/42] esp: remove old deferred command completion mechanism, Mark Cave-Ayland, 2021/02/09
- [PATCH v2 33/42] esp: defer command completion interrupt on incoming data transfers, Mark Cave-Ayland, 2021/02/09
- [PATCH v2 35/42] esp: raise interrupt after every non-DMA byte transferred to the FIFO, Mark Cave-Ayland, 2021/02/09
- [PATCH v2 37/42] esp: transition to message out phase after SATN and stop command, Mark Cave-Ayland, 2021/02/09
- [PATCH v2 36/42] esp: add maxlen parameter to get_cmd(), Mark Cave-Ayland, 2021/02/09
- [PATCH v2 38/42] esp: convert ti_buf from array to Fifo8, Mark Cave-Ayland, 2021/02/09
- Re: [PATCH v2 38/42] esp: convert ti_buf from array to Fifo8,
Philippe Mathieu-Daudé <=
- [PATCH v2 39/42] esp: convert cmdbuf from array to Fifo8, Mark Cave-Ayland, 2021/02/09
- [PATCH v2 40/42] esp: add trivial implementation of the ESP_RFLAGS register, Mark Cave-Ayland, 2021/02/09
- [PATCH v2 41/42] esp: implement non-DMA transfers in PDMA mode, Mark Cave-Ayland, 2021/02/09
- [PATCH v2 42/42] esp: add support for unaligned accesses, Mark Cave-Ayland, 2021/02/09
- Re: [PATCH v2 00/42] esp: consolidate PDMA transfer buffers and other fixes, Philippe Mathieu-Daudé, 2021/02/23