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[PATCH RESEND 0/6] hw/mips/gt64120: Minor fixes
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH RESEND 0/6] hw/mips/gt64120: Minor fixes |
Date: |
Tue, 9 Mar 2021 15:26:24 +0100 |
Trivial fixes extracted from another series which became too big,
so I prefer to send them in a previous step.
(This is a resend for Zoltan).
Philippe Mathieu-Daudé (6):
hw/mips/gt64xxx: Initialize ISD I/O memory region in DeviceRealize()
hw/mips/gt64xxx: Simplify ISD MemoryRegion read/write handlers
hw/mips/gt64xxx: Fix typos in qemu_log_mask() formats
hw/mips/gt64xxx: Rename trace events related to interrupt registers
hw/mips/gt64xxx: Trace accesses to ISD registers
hw/mips/gt64xxx: Let the GT64120 manage the lower 512MiB hole
hw/mips/gt64xxx_pci.c | 67 +++++++++++++++++++++++++++----------------
hw/mips/malta.c | 7 -----
hw/mips/trace-events | 6 ++--
3 files changed, 47 insertions(+), 33 deletions(-)
--
2.26.2
- [PATCH RESEND 0/6] hw/mips/gt64120: Minor fixes,
Philippe Mathieu-Daudé <=
- [PATCH RESEND 1/6] hw/mips/gt64xxx: Initialize ISD I/O memory region in DeviceRealize(), Philippe Mathieu-Daudé, 2021/03/09
- [PATCH RESEND 2/6] hw/mips/gt64xxx: Simplify ISD MemoryRegion read/write handlers, Philippe Mathieu-Daudé, 2021/03/09
- [PATCH RESEND 3/6] hw/mips/gt64xxx: Fix typos in qemu_log_mask() formats, Philippe Mathieu-Daudé, 2021/03/09
- [PATCH RESEND 4/6] hw/mips/gt64xxx: Rename trace events related to interrupt registers, Philippe Mathieu-Daudé, 2021/03/09
- [PATCH RESEND 5/6] hw/mips/gt64xxx: Trace accesses to ISD registers, Philippe Mathieu-Daudé, 2021/03/09