Re: [PATCH v4 06/17] target/ppc: Fix comment for MSR_FE{0,1}

[Cédric Le Goater]

On 3/15/21 7:46 PM, Richard Henderson wrote:
> As per hreg_compute_hflags:
> 
>   We 'forget' FE0 & FE1: we'll never generate imprecise exceptions
> 
> remove the hflags marker from the respective comments.
> 
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Reviewed-by: Cédric Le Goater <clg@kaod.org>

Thanks,

C.

> ---
>  target/ppc/cpu.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
> index 79c4033a42..fd13489dce 100644
> --- a/target/ppc/cpu.h
> +++ b/target/ppc/cpu.h
> @@ -322,13 +322,13 @@ typedef struct ppc_v3_pate_t {
>  #define MSR_PR   14 /* Problem state                                  hflags 
> */
>  #define MSR_FP   13 /* Floating point available                       hflags 
> */
>  #define MSR_ME   12 /* Machine check interrupt enable                        
> */
> -#define MSR_FE0  11 /* Floating point exception mode 0                hflags 
> */
> +#define MSR_FE0  11 /* Floating point exception mode 0                       
> */
>  #define MSR_SE   10 /* Single-step trace enable                     x hflags 
> */
>  #define MSR_DWE  10 /* Debug wait enable on 405                     x        
> */
>  #define MSR_UBLE 10 /* User BTB lock enable on e500                 x        
> */
>  #define MSR_BE   9  /* Branch trace enable                          x hflags 
> */
>  #define MSR_DE   9  /* Debug interrupts enable on embedded PowerPC  x        
> */
> -#define MSR_FE1  8  /* Floating point exception mode 1                hflags 
> */
> +#define MSR_FE1  8  /* Floating point exception mode 1                       
> */
>  #define MSR_AL   7  /* AL bit on POWER                                       
> */
>  #define MSR_EP   6  /* Exception prefix on 601                               
> */
>  #define MSR_IR   5  /* Instruction relocate                                  
> */
>