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Re: [PATCH 0/5] tcg: Issue memory barriers for guest memory model
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Subject: |
Re: [PATCH 0/5] tcg: Issue memory barriers for guest memory model |
Date: |
Tue, 16 Mar 2021 15:30:48 -0700 (PDT) |
Patchew URL:
20210316220735.2048137-1-richard.henderson@linaro.org/">https://patchew.org/QEMU/20210316220735.2048137-1-richard.henderson@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20210316220735.2048137-1-richard.henderson@linaro.org
Subject: [PATCH 0/5] tcg: Issue memory barriers for guest memory model
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
- [tag update]
patchew/20210311143958.562625-1-richard.henderson@linaro.org ->
patchew/20210311143958.562625-1-richard.henderson@linaro.org
* [new tag]
patchew/20210316220735.2048137-1-richard.henderson@linaro.org ->
patchew/20210316220735.2048137-1-richard.henderson@linaro.org
Switched to a new branch 'test'
06ceb5a tcg: Add host memory barriers to cpu_ldst.h interfaces
be4ade5 tcg: Create tcg_req_mo
1336778 tcg: Elide memory barriers implied by the host memory model
d0f90d5 tcg: Do not elide memory barriers for CF_PARALLEL
c9f634b tcg: Decode the operand to INDEX_op_mb in dumps
=== OUTPUT BEGIN ===
1/5 Checking commit c9f634bdbe20 (tcg: Decode the operand to INDEX_op_mb in
dumps)
2/5 Checking commit d0f90d584f17 (tcg: Do not elide memory barriers for
CF_PARALLEL)
3/5 Checking commit 133677838f14 (tcg: Elide memory barriers implied by the
host memory model)
4/5 Checking commit be4ade51a457 (tcg: Create tcg_req_mo)
5/5 Checking commit 06ceb5ad212a (tcg: Add host memory barriers to cpu_ldst.h
interfaces)
ERROR: memory barrier without comment
#189: FILE: include/exec/cpu_ldst.h:175:
+ smp_mb(); \
total: 1 errors, 0 warnings, 146 lines checked
Patch 5/5 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
20210316220735.2048137-1-richard.henderson@linaro.org/testing.checkpatch/?type=message">http://patchew.org/logs/20210316220735.2048137-1-richard.henderson@linaro.org/testing.checkpatch/?type=message.
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- [PATCH 0/5] tcg: Issue memory barriers for guest memory model, Richard Henderson, 2021/03/16
- [PATCH 1/5] tcg: Decode the operand to INDEX_op_mb in dumps, Richard Henderson, 2021/03/16
- [PATCH 2/5] tcg: Do not elide memory barriers for CF_PARALLEL, Richard Henderson, 2021/03/16
- [PATCH 3/5] tcg: Elide memory barriers implied by the host memory model, Richard Henderson, 2021/03/16
- [PATCH 5/5] tcg: Add host memory barriers to cpu_ldst.h interfaces, Richard Henderson, 2021/03/16
- [PATCH 4/5] tcg: Create tcg_req_mo, Richard Henderson, 2021/03/16
- Re: [PATCH 0/5] tcg: Issue memory barriers for guest memory model,
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