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[PATCH 1/2] target/riscv: csr: Fix hmode32() for RV64
From: |
Bin Meng |
Subject: |
[PATCH 1/2] target/riscv: csr: Fix hmode32() for RV64 |
Date: |
Wed, 31 Mar 2021 10:18:24 +0800 |
hmode32() should return -RISCV_EXCP_ILLEGAL_INST for RV64.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---
target/riscv/csr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index d2585395bf..2bad396f64 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -177,7 +177,7 @@ static int hmode(CPURISCVState *env, int csrno)
static int hmode32(CPURISCVState *env, int csrno)
{
if (!riscv_cpu_is_32bit(env)) {
- return 0;
+ return -RISCV_EXCP_ILLEGAL_INST;
}
return hmode(env, csrno);
--
2.25.1
- [PATCH 1/2] target/riscv: csr: Fix hmode32() for RV64,
Bin Meng <=