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Re: [PATCH v1 3/3] target/ppc: Add POWER10 exception model
From: |
Nicholas Piggin |
Subject: |
Re: [PATCH v1 3/3] target/ppc: Add POWER10 exception model |
Date: |
Wed, 14 Apr 2021 13:28:03 +1000 |
Excerpts from Fabiano Rosas's message of April 14, 2021 1:53 am:
> Nicholas Piggin <npiggin@gmail.com> writes:
>
>> POWER10 adds a new bit that modifies interrupt behaviour, LPCR[HAIL],
>> and it removes support for the LPCR[AIL]=0b10 mode.
>>
>> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
>> ---
[snip]
Thanks for the suggestions, I will consider them if people prefer to go
this way rather than the "cleanup first" approach in the RFC I just
posted.
Thanks,
Nick
- Re: [PATCH v1 1/3] target/ppc: Fix POWER9 radix guest HV interrupt AIL behaviour, (continued)