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[RFC v14 38/80] target/arm: rename handle_semihosting to tcg_handle_semi
From: |
Claudio Fontana |
Subject: |
[RFC v14 38/80] target/arm: rename handle_semihosting to tcg_handle_semihosting |
Date: |
Fri, 16 Apr 2021 18:27:42 +0200 |
make it clearer from the name that this is a tcg-only function.
Signed-off-by: Claudio Fontana <cfontana@suse.de>
---
target/arm/tcg/tcg-cpu.h | 2 +-
target/arm/cpu-sysemu.c | 2 +-
target/arm/tcg/sysemu/tcg-cpu.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/arm/tcg/tcg-cpu.h b/target/arm/tcg/tcg-cpu.h
index 0ee8ba073b..7e62f92d16 100644
--- a/target/arm/tcg/tcg-cpu.h
+++ b/target/arm/tcg/tcg-cpu.h
@@ -24,7 +24,7 @@
#ifndef CONFIG_USER_ONLY
/* Do semihosting call and set the appropriate return value. */
-void handle_semihosting(CPUState *cs);
+void tcg_handle_semihosting(CPUState *cs);
#endif /* !CONFIG_USER_ONLY */
diff --git a/target/arm/cpu-sysemu.c b/target/arm/cpu-sysemu.c
index 0e872b2e55..7569241339 100644
--- a/target/arm/cpu-sysemu.c
+++ b/target/arm/cpu-sysemu.c
@@ -1153,7 +1153,7 @@ void arm_cpu_do_interrupt(CPUState *cs)
* must be handled here.
*/
if (cs->exception_index == EXCP_SEMIHOST) {
- handle_semihosting(cs);
+ tcg_handle_semihosting(cs);
return;
}
#endif /* CONFIG_TCG */
diff --git a/target/arm/tcg/sysemu/tcg-cpu.c b/target/arm/tcg/sysemu/tcg-cpu.c
index af9d3905d7..2c395f47e7 100644
--- a/target/arm/tcg/sysemu/tcg-cpu.c
+++ b/target/arm/tcg/sysemu/tcg-cpu.c
@@ -52,7 +52,7 @@
* We only see semihosting exceptions in TCG only as they are not
* trapped to the hypervisor in KVM.
*/
-void handle_semihosting(CPUState *cs)
+void tcg_handle_semihosting(CPUState *cs)
{
ARMCPU *cpu = ARM_CPU(cs);
CPUARMState *env = &cpu->env;
--
2.26.2
- [RFC v14 14/80] target/arm: split cpregs from tcg/helper.c, (continued)
- [RFC v14 14/80] target/arm: split cpregs from tcg/helper.c, Claudio Fontana, 2021/04/16
- [RFC v14 23/80] target/arm: move sve_zcr_len_for_el to common_cpu, Claudio Fontana, 2021/04/16
- [RFC v14 20/80] target/arm: move arm_hcr_el2_eff from tcg/ to common_cpu, Claudio Fontana, 2021/04/16
- [RFC v14 26/80] target/arm: move aarch64_sync_32_to_64 (and vv) to cpu code, Claudio Fontana, 2021/04/16
- [RFC v14 27/80] target/arm: new cpu32 ARM 32 bit CPU Class, Claudio Fontana, 2021/04/16
- [RFC v14 28/80] target/arm: split 32bit and 64bit arm dump state, Claudio Fontana, 2021/04/16
- [RFC v14 29/80] target/arm: move a15 cpu model away from the TCG-only models, Claudio Fontana, 2021/04/16
- [RFC v14 25/80] target/arm: move arm_cpu_list to common_cpu, Claudio Fontana, 2021/04/16
- [RFC v14 32/80] target/arm: fix comments style of fp_exception_el before moving it, Claudio Fontana, 2021/04/16
- [RFC v14 33/80] target/arm: move fp_exception_el out of TCG helpers, Claudio Fontana, 2021/04/16
- [RFC v14 38/80] target/arm: rename handle_semihosting to tcg_handle_semihosting,
Claudio Fontana <=
- [RFC v14 42/80] target/arm: wrap call to aarch64_sve_change_el in tcg_enabled(), Claudio Fontana, 2021/04/16
- [RFC v14 45/80] MAINTAINERS: update arm kvm maintained files to all in target/arm/kvm/, Claudio Fontana, 2021/04/16
- [RFC v14 48/80] target/arm: remove kvm-stub.c, Claudio Fontana, 2021/04/16
- [RFC v14 34/80] target/arm: remove now useless ifndef from fp_exception_el, Claudio Fontana, 2021/04/16
- [RFC v14 30/80] target/arm: fixup sve_exception_el code style before move, Claudio Fontana, 2021/04/16
- [RFC v14 31/80] target/arm: move sve_exception_el out of TCG helpers, Claudio Fontana, 2021/04/16
- [RFC v14 39/80] target/arm: replace CONFIG_TCG with tcg_enabled, Claudio Fontana, 2021/04/16
- [RFC v14 36/80] target/arm: fix style of arm_cpu_do_interrupt functions before move, Claudio Fontana, 2021/04/16
- [RFC v14 35/80] target/arm: make further preparation for the exception code to move, Claudio Fontana, 2021/04/16
- [RFC v14 43/80] target/arm: remove kvm include file for PSCI and arm-powerctl, Claudio Fontana, 2021/04/16