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[PATCH v5 22/81] target/arm: Implement SVE2 bitwise shift and insert
From: |
Richard Henderson |
Subject: |
[PATCH v5 22/81] target/arm: Implement SVE2 bitwise shift and insert |
Date: |
Fri, 16 Apr 2021 14:01:41 -0700 |
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/sve.decode | 5 +++++
target/arm/translate-sve.c | 10 ++++++++++
2 files changed, 15 insertions(+)
diff --git a/target/arm/sve.decode b/target/arm/sve.decode
index d3c4ec6dd1..695a16551e 100644
--- a/target/arm/sve.decode
+++ b/target/arm/sve.decode
@@ -1261,3 +1261,8 @@ SSRA 01000101 .. 0 ..... 1110 00 ..... .....
@rd_rn_tszimm_shr
USRA 01000101 .. 0 ..... 1110 01 ..... ..... @rd_rn_tszimm_shr
SRSRA 01000101 .. 0 ..... 1110 10 ..... ..... @rd_rn_tszimm_shr
URSRA 01000101 .. 0 ..... 1110 11 ..... ..... @rd_rn_tszimm_shr
+
+## SVE2 bitwise shift and insert
+
+SRI 01000101 .. 0 ..... 11110 0 ..... ..... @rd_rn_tszimm_shr
+SLI 01000101 .. 0 ..... 11110 1 ..... ..... @rd_rn_tszimm_shl
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index c11074cccc..d74a15d8b8 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -6428,3 +6428,13 @@ static bool trans_URSRA(DisasContext *s, arg_rri_esz *a)
{
return do_sve2_fn2i(s, a, gen_gvec_ursra);
}
+
+static bool trans_SRI(DisasContext *s, arg_rri_esz *a)
+{
+ return do_sve2_fn2i(s, a, gen_gvec_sri);
+}
+
+static bool trans_SLI(DisasContext *s, arg_rri_esz *a)
+{
+ return do_sve2_fn2i(s, a, gen_gvec_sli);
+}
--
2.25.1
- [PATCH v5 15/81] target/arm: Implement SVE2 bitwise shift left long, (continued)
- [PATCH v5 15/81] target/arm: Implement SVE2 bitwise shift left long, Richard Henderson, 2021/04/16
- [PATCH v5 14/81] target/arm: Implement PMULLB and PMULLT, Richard Henderson, 2021/04/16
- [PATCH v5 13/81] target/arm: Implement SVE2 integer multiply long, Richard Henderson, 2021/04/16
- [PATCH v5 16/81] target/arm: Implement SVE2 bitwise exclusive-or interleaved, Richard Henderson, 2021/04/16
- [PATCH v5 12/81] target/arm: Implement SVE2 integer add/subtract wide, Richard Henderson, 2021/04/16
- [PATCH v5 17/81] target/arm: Implement SVE2 bitwise permute, Richard Henderson, 2021/04/16
- [PATCH v5 21/81] target/arm: Implement SVE2 bitwise shift right and accumulate, Richard Henderson, 2021/04/16
- [PATCH v5 18/81] target/arm: Implement SVE2 complex integer add, Richard Henderson, 2021/04/16
- [PATCH v5 19/81] target/arm: Implement SVE2 integer absolute difference and accumulate long, Richard Henderson, 2021/04/16
- [PATCH v5 20/81] target/arm: Implement SVE2 integer add/subtract long with carry, Richard Henderson, 2021/04/16
- [PATCH v5 22/81] target/arm: Implement SVE2 bitwise shift and insert,
Richard Henderson <=
- [PATCH v5 23/81] target/arm: Implement SVE2 integer absolute difference and accumulate, Richard Henderson, 2021/04/16
- [PATCH v5 24/81] target/arm: Implement SVE2 saturating extract narrow, Richard Henderson, 2021/04/16
- [PATCH v5 25/81] target/arm: Implement SVE2 floating-point pairwise, Richard Henderson, 2021/04/16
- [PATCH v5 26/81] target/arm: Implement SVE2 SHRN, RSHRN, Richard Henderson, 2021/04/16
- [PATCH v5 28/81] target/arm: Implement SVE2 UQSHRN, UQRSHRN, Richard Henderson, 2021/04/16
- [PATCH v5 27/81] target/arm: Implement SVE2 SQSHRUN, SQRSHRUN, Richard Henderson, 2021/04/16
- [PATCH v5 30/81] target/arm: Implement SVE2 WHILEGT, WHILEGE, WHILEHI, WHILEHS, Richard Henderson, 2021/04/16
- [PATCH v5 33/81] target/arm: Implement SVE2 MATCH, NMATCH, Richard Henderson, 2021/04/16
- [PATCH v5 34/81] target/arm: Implement SVE2 saturating multiply-add long, Richard Henderson, 2021/04/16
- [PATCH v5 29/81] target/arm: Implement SVE2 SQSHRN, SQRSHRN, Richard Henderson, 2021/04/16