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[PATCH v4 03/30] target/mips: Move msa_reset() to new source file
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH v4 03/30] target/mips: Move msa_reset() to new source file |
Date: |
Wed, 28 Apr 2021 19:03:43 +0200 |
mips_cpu_reset() is used by all accelerators, and calls
msa_reset(), which is defined in msa_helper.c.
Beside msa_reset(), the rest of msa_helper.c is only useful
to the TCG accelerator. To be able to restrict this helper
file to TCG, we need to move msa_reset() out of it.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/mips/msa.c | 60 ++++++++++++++++++++++++++++++++++++++++
target/mips/msa_helper.c | 36 ------------------------
target/mips/meson.build | 1 +
3 files changed, 61 insertions(+), 36 deletions(-)
create mode 100644 target/mips/msa.c
diff --git a/target/mips/msa.c b/target/mips/msa.c
new file mode 100644
index 00000000000..61f1a9a5936
--- /dev/null
+++ b/target/mips/msa.c
@@ -0,0 +1,60 @@
+/*
+ * MIPS SIMD Architecture Module Instruction emulation helpers for QEMU.
+ *
+ * Copyright (c) 2014 Imagination Technologies
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "qemu/osdep.h"
+#include "cpu.h"
+#include "internal.h"
+#include "fpu/softfloat.h"
+#include "fpu_helper.h"
+
+void msa_reset(CPUMIPSState *env)
+{
+ if (!ase_msa_available(env)) {
+ return;
+ }
+
+#ifdef CONFIG_USER_ONLY
+ /* MSA access enabled */
+ env->CP0_Config5 |= 1 << CP0C5_MSAEn;
+ env->CP0_Status |= (1 << CP0St_CU1) | (1 << CP0St_FR);
+#endif
+
+ /*
+ * MSA CSR:
+ * - non-signaling floating point exception mode off (NX bit is 0)
+ * - Cause, Enables, and Flags are all 0
+ * - round to nearest / ties to even (RM bits are 0)
+ */
+ env->active_tc.msacsr = 0;
+
+ restore_msa_fp_status(env);
+
+ /* tininess detected after rounding.*/
+ set_float_detect_tininess(float_tininess_after_rounding,
+ &env->active_tc.msa_fp_status);
+
+ /* clear float_status exception flags */
+ set_float_exception_flags(0, &env->active_tc.msa_fp_status);
+
+ /* clear float_status nan mode */
+ set_default_nan_mode(0, &env->active_tc.msa_fp_status);
+
+ /* set proper signanling bit meaning ("1" means "quiet") */
+ set_snan_bit_is_one(0, &env->active_tc.msa_fp_status);
+}
diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c
index 4caefe29ad7..04af54f66d1 100644
--- a/target/mips/msa_helper.c
+++ b/target/mips/msa_helper.c
@@ -8595,39 +8595,3 @@ void helper_msa_st_d(CPUMIPSState *env, uint32_t wd,
cpu_stq_data(env, addr + (1 << DF_DOUBLE), pwd->d[1]);
#endif
}
-
-void msa_reset(CPUMIPSState *env)
-{
- if (!ase_msa_available(env)) {
- return;
- }
-
-#ifdef CONFIG_USER_ONLY
- /* MSA access enabled */
- env->CP0_Config5 |= 1 << CP0C5_MSAEn;
- env->CP0_Status |= (1 << CP0St_CU1) | (1 << CP0St_FR);
-#endif
-
- /*
- * MSA CSR:
- * - non-signaling floating point exception mode off (NX bit is 0)
- * - Cause, Enables, and Flags are all 0
- * - round to nearest / ties to even (RM bits are 0)
- */
- env->active_tc.msacsr = 0;
-
- restore_msa_fp_status(env);
-
- /* tininess detected after rounding.*/
- set_float_detect_tininess(float_tininess_after_rounding,
- &env->active_tc.msa_fp_status);
-
- /* clear float_status exception flags */
- set_float_exception_flags(0, &env->active_tc.msa_fp_status);
-
- /* clear float_status nan mode */
- set_default_nan_mode(0, &env->active_tc.msa_fp_status);
-
- /* set proper signanling bit meaning ("1" means "quiet") */
- set_snan_bit_is_one(0, &env->active_tc.msa_fp_status);
-}
diff --git a/target/mips/meson.build b/target/mips/meson.build
index 5fcb211ca9a..daf5f1d55bc 100644
--- a/target/mips/meson.build
+++ b/target/mips/meson.build
@@ -11,6 +11,7 @@
'cpu.c',
'fpu.c',
'gdbstub.c',
+ 'msa.c',
))
mips_tcg_ss = ss.source_set()
mips_tcg_ss.add(gen)
--
2.26.3
- [PATCH v4 00/30] target/mips: Re-org to allow KVM-only builds, Philippe Mathieu-Daudé, 2021/04/28
- [PATCH v4 01/30] target/mips: Simplify meson TCG rules, Philippe Mathieu-Daudé, 2021/04/28
- [PATCH v4 02/30] target/mips: Move IEEE rounding mode array to new source file, Philippe Mathieu-Daudé, 2021/04/28
- [PATCH v4 03/30] target/mips: Move msa_reset() to new source file,
Philippe Mathieu-Daudé <=
- [PATCH v4 04/30] target/mips: Make CPU/FPU regnames[] arrays global, Philippe Mathieu-Daudé, 2021/04/28
- [PATCH v4 05/30] target/mips: Optimize CPU/FPU regnames[] arrays, Philippe Mathieu-Daudé, 2021/04/28
- [PATCH v4 06/30] target/mips: Restrict mips_cpu_dump_state() to cpu.c, Philippe Mathieu-Daudé, 2021/04/28
- [PATCH v4 07/30] target/mips: Turn printfpr() macro into a proper function, Philippe Mathieu-Daudé, 2021/04/28
- [PATCH v4 08/30] target/mips: Declare mips_env_set_pc() inlined in "internal.h", Philippe Mathieu-Daudé, 2021/04/28
- [PATCH v4 09/30] target/mips: Merge do_translate_address into cpu_mips_translate_address, Philippe Mathieu-Daudé, 2021/04/28
- [PATCH v4 10/30] target/mips: Extract load/store helpers to ldst_helper.c, Philippe Mathieu-Daudé, 2021/04/28
- [PATCH v4 11/30] meson: Introduce meson_user_arch source set for arch-specific user-mode, Philippe Mathieu-Daudé, 2021/04/28
- [PATCH v4 12/30] target/mips: Introduce tcg-internal.h for TCG specific declarations, Philippe Mathieu-Daudé, 2021/04/28