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[PATCH v3 25/30] target/ppc: Move ADDI, ADDIS to decodetree, implement P
From: |
Richard Henderson |
Subject: |
[PATCH v3 25/30] target/ppc: Move ADDI, ADDIS to decodetree, implement PADDI |
Date: |
Thu, 29 Apr 2021 18:15:38 -0700 |
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/ppc/insn32.decode | 12 +++++++
target/ppc/insn64.decode | 15 +++++++++
target/ppc/translate.c | 29 ----------------
target/ppc/translate/fixedpoint-impl.c.inc | 39 ++++++++++++++++++++++
4 files changed, 66 insertions(+), 29 deletions(-)
diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode
index b175441209..52d9b355d4 100644
--- a/target/ppc/insn32.decode
+++ b/target/ppc/insn32.decode
@@ -16,3 +16,15 @@
# You should have received a copy of the GNU Lesser General Public
# License along with this library; if not, see <http://www.gnu.org/licenses/>.
#
+
+&D rt ra si
+@D ...... rt:5 ra:5 si:s16 &D
+
+# If a prefix is allowed, decode with default values.
+&PLS_D rt ra si:int64_t r:bool
+@PLS_D ...... rt:5 ra:5 si:s16 &PLS_D r=0
+
+### Fixed-Point Arithmetic Instructions
+
+ADDI 001110 ..... ..... ................ @PLS_D
+ADDIS 001111 ..... ..... ................ @D
diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode
index 9fc45d0614..f4272df724 100644
--- a/target/ppc/insn64.decode
+++ b/target/ppc/insn64.decode
@@ -16,3 +16,18 @@
# You should have received a copy of the GNU Lesser General Public
# License along with this library; if not, see <http://www.gnu.org/licenses/>.
#
+
+# Many all of these instruction names would be prefixed by "P",
+# but we share code with the non-prefixed instruction.
+
+# Format MLS:D and 8LS:D
+&PLS_D rt ra si:int64_t r:bool !extern
+%pls_si 32:s18 0:16
+@PLS_D ...... .. ... r:1 .. .................. \
+ ...... rt:5 ra:5 ................ \
+ &PLS_D si=%pls_si
+
+### Fixed-Point Arithmetic Instructions
+
+ADDI 000001 10 0--.-- .................. \
+ 001110 ..... ..... ................ @PLS_D
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index d782a13d27..5a8a3c39c3 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -924,19 +924,6 @@ GEN_INT_ARITH_ADD(addex, 0x05, cpu_ov, 1, 1, 0);
/* addze addze. addzeo addzeo.*/
GEN_INT_ARITH_ADD_CONST(addze, 0x06, 0, cpu_ca, 1, 1, 0)
GEN_INT_ARITH_ADD_CONST(addzeo, 0x16, 0, cpu_ca, 1, 1, 1)
-/* addi */
-static void gen_addi(DisasContext *ctx)
-{
- target_long simm = SIMM(ctx->opcode);
-
- if (rA(ctx->opcode) == 0) {
- /* li case */
- tcg_gen_movi_tl(cpu_gpr[rD(ctx->opcode)], simm);
- } else {
- tcg_gen_addi_tl(cpu_gpr[rD(ctx->opcode)],
- cpu_gpr[rA(ctx->opcode)], simm);
- }
-}
/* addic addic.*/
static inline void gen_op_addic(DisasContext *ctx, bool compute_rc0)
{
@@ -956,20 +943,6 @@ static void gen_addic_(DisasContext *ctx)
gen_op_addic(ctx, 1);
}
-/* addis */
-static void gen_addis(DisasContext *ctx)
-{
- target_long simm = SIMM(ctx->opcode);
-
- if (rA(ctx->opcode) == 0) {
- /* lis case */
- tcg_gen_movi_tl(cpu_gpr[rD(ctx->opcode)], simm << 16);
- } else {
- tcg_gen_addi_tl(cpu_gpr[rD(ctx->opcode)],
- cpu_gpr[rA(ctx->opcode)], simm << 16);
- }
-}
-
/* addpcis */
static void gen_addpcis(DisasContext *ctx)
{
@@ -7029,10 +7002,8 @@ GEN_HANDLER_E(cmpeqb, 0x1F, 0x00, 0x07, 0x00600000,
PPC_NONE, PPC2_ISA300),
GEN_HANDLER_E(cmpb, 0x1F, 0x1C, 0x0F, 0x00000001, PPC_NONE, PPC2_ISA205),
GEN_HANDLER_E(cmprb, 0x1F, 0x00, 0x06, 0x00400001, PPC_NONE, PPC2_ISA300),
GEN_HANDLER(isel, 0x1F, 0x0F, 0xFF, 0x00000001, PPC_ISEL),
-GEN_HANDLER(addi, 0x0E, 0xFF, 0xFF, 0x00000000, PPC_INTEGER),
GEN_HANDLER(addic, 0x0C, 0xFF, 0xFF, 0x00000000, PPC_INTEGER),
GEN_HANDLER2(addic_, "addic.", 0x0D, 0xFF, 0xFF, 0x00000000, PPC_INTEGER),
-GEN_HANDLER(addis, 0x0F, 0xFF, 0xFF, 0x00000000, PPC_INTEGER),
GEN_HANDLER_E(addpcis, 0x13, 0x2, 0xFF, 0x00000000, PPC_NONE, PPC2_ISA300),
GEN_HANDLER(mulhw, 0x1F, 0x0B, 0x02, 0x00000400, PPC_INTEGER),
GEN_HANDLER(mulhwu, 0x1F, 0x0B, 0x00, 0x00000400, PPC_INTEGER),
diff --git a/target/ppc/translate/fixedpoint-impl.c.inc
b/target/ppc/translate/fixedpoint-impl.c.inc
index b740083605..7af1b3bcf5 100644
--- a/target/ppc/translate/fixedpoint-impl.c.inc
+++ b/target/ppc/translate/fixedpoint-impl.c.inc
@@ -16,3 +16,42 @@
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
+
+/*
+ * Incorporate CIA into the constant when R=1.
+ * Validate that when R=1, RA=0.
+ */
+static bool resolve_PLS_D(DisasContext *ctx, arg_PLS_D *a)
+{
+ if (a->r) {
+ if (unlikely(a->ra != 0)) {
+ gen_invalid(ctx);
+ return false;
+ }
+ a->si += ctx->cia;
+ }
+ return true;
+}
+
+static bool trans_ADDI(DisasContext *ctx, arg_PLS_D *a)
+{
+ if (resolve_PLS_D(ctx, a)) {
+ if (a->ra) {
+ tcg_gen_addi_tl(cpu_gpr[a->rt], cpu_gpr[a->ra], a->si);
+ } else {
+ tcg_gen_movi_tl(cpu_gpr[a->rt], a->si);
+ }
+ }
+ return true;
+}
+
+static bool trans_ADDIS(DisasContext *ctx, arg_D *a)
+{
+ int si = a->si << 16;
+ if (a->ra) {
+ tcg_gen_addi_tl(cpu_gpr[a->rt], cpu_gpr[a->ra], si);
+ } else {
+ tcg_gen_movi_tl(cpu_gpr[a->rt], si);
+ }
+ return true;
+}
--
2.25.1
- [PATCH v3 17/30] target/ppc: Remove DisasContext.exception, (continued)
- [PATCH v3 17/30] target/ppc: Remove DisasContext.exception, Richard Henderson, 2021/04/29
- [PATCH v3 19/30] target/ppc: Tidy exception vs exit_tb, Richard Henderson, 2021/04/29
- [PATCH v3 13/30] target/ppc: Remove unnecessary gen_io_end calls, Richard Henderson, 2021/04/29
- [PATCH v3 21/30] target/ppc: Use translator_loop_temp_check, Richard Henderson, 2021/04/29
- [PATCH v3 20/30] target/ppc: Mark helper_raise_exception* as noreturn, Richard Henderson, 2021/04/29
- [PATCH v3 22/30] target/ppc: Introduce macros to check isa extensions, Richard Henderson, 2021/04/29
- [PATCH v3 24/30] target/ppc: Move page crossing check to ppc_tr_translate_insn, Richard Henderson, 2021/04/29
- [PATCH v3 26/30] target/ppc: Implement PNOP, Richard Henderson, 2021/04/29
- [PATCH v3 25/30] target/ppc: Move ADDI, ADDIS to decodetree, implement PADDI,
Richard Henderson <=
- RE: [PATCH v3 25/30] target/ppc: Move ADDI, ADDIS to decodetree, implement PADDI, Luis Fernando Fujita Pires, 2021/04/30
- Re: [PATCH v3 25/30] target/ppc: Move ADDI, ADDIS to decodetree, implement PADDI, Richard Henderson, 2021/04/30
- RE: [PATCH v3 25/30] target/ppc: Move ADDI, ADDIS to decodetree, implement PADDI, Luis Fernando Fujita Pires, 2021/04/30
- Re: [PATCH v3 25/30] target/ppc: Move ADDI, ADDIS to decodetree, implement PADDI, Richard Henderson, 2021/04/30
- RE: [PATCH v3 25/30] target/ppc: Move ADDI, ADDIS to decodetree, implement PADDI, Luis Fernando Fujita Pires, 2021/04/30
- Re: [PATCH v3 25/30] target/ppc: Move ADDI, ADDIS to decodetree, implement PADDI, Richard Henderson, 2021/04/30
Re: [PATCH v3 25/30] target/ppc: Move ADDI, ADDIS to decodetree, implement PADDI, Matheus K. Ferst, 2021/04/30
- Re: [PATCH v3 25/30] target/ppc: Move ADDI, ADDIS to decodetree, implement PADDI, Richard Henderson, 2021/04/30
- Re: [PATCH v3 25/30] target/ppc: Move ADDI, ADDIS to decodetree, implement PADDI, Matheus K. Ferst, 2021/04/30
- Re: [PATCH v3 25/30] target/ppc: Move ADDI, ADDIS to decodetree, implement PADDI, Richard Henderson, 2021/04/30