Re: [PATCH v6 38/82] target/arm: Implement SVE2 ADDHNB, ADDHNT

[Richard Henderson]

On 5/12/21 10:23 AM, Peter Maydell wrote:
> On Fri, 30 Apr 2021 at 22:00, Richard Henderson
> <richard.henderson@linaro.org> wrote:
> > From: Stephen Long <steplong@quicinc.com>
> >
> > Signed-off-by: Stephen Long <steplong@quicinc.com>
> > Message-Id: <20200417162231.10374-2-steplong@quicinc.com>
> > Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> > ---
>
> > diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c
> > index 572d41a26c..2dead1f056 100644
> > --- a/target/arm/sve_helper.c
> > +++ b/target/arm/sve_helper.c
> > @@ -2112,6 +2112,42 @@ DO_SHRNT(sve2_uqrshrnt_d, uint64_t, uint32_t,     , 
> > H1_4, DO_UQRSHRN_D)
> >   #undef DO_SHRNB
> >   #undef DO_SHRNT
> >
> > +#define DO_BINOPNB(NAME, TYPEW, TYPEN, SHIFT, OP)                           \
> > +void HELPER(NAME)(void *vd, void *vn, void *vm, uint32_t desc)              \
> > +{                                                                           \
> > +    intptr_t i, opr_sz = simd_oprsz(desc);                                  \
> > +    for (i = 0; i < opr_sz; i += sizeof(TYPEW)) {                           \
> > +        TYPEW nn = *(TYPEW *)(vn + i);                                      \
> > +        TYPEW mm = *(TYPEW *)(vm + i);                                      \
> > +        *(TYPEW *)(vd + i) = (TYPEN)OP(nn, mm, SHIFT);                      \
> > +    }                                                                       \
> > +}
>
> Doesn't this need H macros like the 'T' version ?

No, all memory ops are the same TYPEW column.


r~