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[PATCH v2 28/50] target/i386: Reorder DisasContext members
From: |
Richard Henderson |
Subject: |
[PATCH v2 28/50] target/i386: Reorder DisasContext members |
Date: |
Fri, 14 May 2021 10:13:20 -0500 |
Sort all of the single-byte members to the same area
of the structure, eliminating 8 bytes of padding.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/i386/tcg/translate.c | 27 ++++++++++++++-------------
1 file changed, 14 insertions(+), 13 deletions(-)
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index d48c0f82a9..18f1c0342f 100644
--- a/target/i386/tcg/translate.c
+++ b/target/i386/tcg/translate.c
@@ -76,20 +76,24 @@ static TCGv_i64 cpu_bndu[4];
typedef struct DisasContext {
DisasContextBase base;
- /* current insn context */
- int8_t override; /* -1 if no override, else R_CS, R_DS, etc */
- uint8_t prefix;
+ target_ulong pc; /* pc = eip + cs_base */
+ target_ulong pc_start; /* pc at TB entry */
+ target_ulong cs_base; /* base of CS segment */
+
MemOp aflag;
MemOp dflag;
- target_ulong pc_start;
- target_ulong pc; /* pc = eip + cs_base */
- /* current block context */
- target_ulong cs_base; /* base of CS segment */
+
+ int8_t override; /* -1 if no override, else R_CS, R_DS, etc */
+ uint8_t prefix;
#ifndef CONFIG_USER_ONLY
uint8_t cpl; /* code priv level */
uint8_t iopl; /* i/o priv level */
#endif
+ uint8_t vex_l; /* vex vector length */
+ uint8_t vex_v; /* vex vvvv register, without 1's complement. */
+ uint8_t popl_esp_hack; /* for correct popl with esp base handling */
+ uint8_t rip_offset; /* only used in x86_64, but left for simplicity */
#ifdef TARGET_X86_64
uint8_t rex_r;
@@ -97,16 +101,13 @@ typedef struct DisasContext {
uint8_t rex_b;
bool rex_w;
#endif
- uint8_t vex_l; /* vex vector length */
- uint8_t vex_v; /* vex vvvv register, without 1's complement. */
- CCOp cc_op; /* current CC operation */
- bool cc_op_dirty;
bool jmp_opt; /* use direct block chaining for direct jumps */
bool repz_opt; /* optimize jumps within repz instructions */
+ bool cc_op_dirty;
+
+ CCOp cc_op; /* current CC operation */
int mem_index; /* select memory access functions */
uint32_t flags; /* all execution flags */
- uint8_t popl_esp_hack; /* for correct popl with esp base handling */
- uint8_t rip_offset; /* only used in x86_64, but left for simplicity */
int cpuid_features;
int cpuid_ext_features;
int cpuid_ext2_features;
--
2.25.1
- [PATCH v2 29/50] target/i386: Add stub generator for helper_set_dr, (continued)
- [PATCH v2 29/50] target/i386: Add stub generator for helper_set_dr, Richard Henderson, 2021/05/14
- [PATCH v2 36/50] target/i386: Tidy svm_check_intercept from tcg, Richard Henderson, 2021/05/14
- [PATCH v2 37/50] target/i386: Remove pc_start argument to gen_svm_check_intercept, Richard Henderson, 2021/05/14
- [PATCH v2 38/50] target/i386: Remove user stub for cpu_vmexit, Richard Henderson, 2021/05/14
- [PATCH v2 39/50] target/i386: Cleanup read_crN, write_crN, lmsw, Richard Henderson, 2021/05/14
- [PATCH v2 28/50] target/i386: Reorder DisasContext members,
Richard Henderson <=
- [PATCH v2 25/50] target/i386: Leave TF in DisasContext.flags, Richard Henderson, 2021/05/14
- [PATCH v2 35/50] target/i386: Simplify gen_debug usage, Richard Henderson, 2021/05/14
- [PATCH v2 34/50] target/i386: Mark some helpers as noreturn, Richard Henderson, 2021/05/14
- [PATCH v2 40/50] target/i386: Pass env to do_pause and do_hlt, Richard Henderson, 2021/05/14
- [PATCH v2 41/50] target/i386: Move invlpg, hlt, monitor, mwait to sysemu, Richard Henderson, 2021/05/14