[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v5 02/23] target/ppc: Replace POWERPC_EXCP_STOP with DISAS_EXIT_U
From: |
matheus . ferst |
Subject: |
[PATCH v5 02/23] target/ppc: Replace POWERPC_EXCP_STOP with DISAS_EXIT_UPDATE |
Date: |
Mon, 17 May 2021 17:50:04 -0300 |
From: Richard Henderson <richard.henderson@linaro.org>
Remove the synthetic "exception" after no more uses.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
---
linux-user/ppc/cpu_loop.c | 3 ---
target/ppc/cpu.h | 1 -
target/ppc/translate.c | 24 +++++++-----------------
3 files changed, 7 insertions(+), 21 deletions(-)
diff --git a/linux-user/ppc/cpu_loop.c b/linux-user/ppc/cpu_loop.c
index 4a0f6c8dc2..fe526693d2 100644
--- a/linux-user/ppc/cpu_loop.c
+++ b/linux-user/ppc/cpu_loop.c
@@ -423,9 +423,6 @@ void cpu_loop(CPUPPCState *env)
cpu_abort(cs, "Maintenance exception while in user mode. "
"Aborting\n");
break;
- case POWERPC_EXCP_STOP: /* stop translation */
- /* We did invalidate the instruction cache. Go on */
- break;
case POWERPC_EXCP_BRANCH: /* branch instruction: */
/* We just stopped because of a branch. Go on */
break;
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 99ee1e09b2..9e38df685d 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -132,7 +132,6 @@ enum {
/* EOL */
POWERPC_EXCP_NB = 103,
/* QEMU exceptions: used internally during code translation */
- POWERPC_EXCP_STOP = 0x200, /* stop translation */
POWERPC_EXCP_BRANCH = 0x201, /* branch instruction */
/* QEMU exceptions: special cases we want to stop translation */
POWERPC_EXCP_SYSCALL_USER = 0x203, /* System call in user mode only */
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 060ef83bc0..f57b67be5f 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -369,13 +369,6 @@ static inline void gen_hvpriv_exception(DisasContext *ctx,
uint32_t error)
gen_exception_err(ctx, POWERPC_EXCP_HV_EMU, POWERPC_EXCP_PRIV | error);
}
-/* Stop translation */
-static inline void gen_stop_exception(DisasContext *ctx)
-{
- gen_update_nip(ctx, ctx->base.pc_next);
- ctx->exception = POWERPC_EXCP_STOP;
-}
-
/*****************************************************************************/
/* SPR READ/WRITE CALLBACKS */
@@ -829,7 +822,7 @@ void spr_write_hid0_601(DisasContext *ctx, int sprn, int
gprn)
{
gen_helper_store_hid0_601(cpu_env, cpu_gpr[gprn]);
/* Must stop the translation as endianness may have changed */
- gen_stop_exception(ctx);
+ ctx->base.is_jmp = DISAS_EXIT_UPDATE;
}
#endif
@@ -877,7 +870,7 @@ void spr_write_40x_dbcr0(DisasContext *ctx, int sprn, int
gprn)
gen_store_spr(sprn, cpu_gpr[gprn]);
gen_helper_store_40x_dbcr0(cpu_env, cpu_gpr[gprn]);
/* We must stop translation as we may have rebooted */
- gen_stop_exception(ctx);
+ ctx->base.is_jmp = DISAS_EXIT_UPDATE;
}
void spr_write_40x_sler(DisasContext *ctx, int sprn, int gprn)
@@ -4080,7 +4073,7 @@ static void gen_isync(DisasContext *ctx)
gen_check_tlb_flush(ctx, false);
}
tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC);
- gen_stop_exception(ctx);
+ ctx->base.is_jmp = DISAS_EXIT_UPDATE;
}
#define MEMOP_GET_SIZE(x) (1 << ((x) & MO_SIZE))
@@ -5312,7 +5305,7 @@ static void gen_mtmsrd(DisasContext *ctx)
gen_helper_store_msr(cpu_env, cpu_gpr[rS(ctx->opcode)]);
}
/* Must stop the translation as machine state (may have) changed */
- gen_stop_exception(ctx);
+ ctx->base.is_jmp = DISAS_EXIT_UPDATE;
#endif /* !defined(CONFIG_USER_ONLY) */
}
#endif /* defined(TARGET_PPC64) */
@@ -5355,7 +5348,7 @@ static void gen_mtmsr(DisasContext *ctx)
tcg_temp_free(msr);
}
/* Must stop the translation as machine state (may have) changed */
- gen_stop_exception(ctx);
+ ctx->base.is_jmp = DISAS_EXIT_UPDATE;
#endif
}
@@ -7492,7 +7485,7 @@ static void gen_wrtee(DisasContext *ctx)
* Stop translation to have a chance to raise an exception if we
* just set msr_ee to 1
*/
- gen_stop_exception(ctx);
+ ctx->base.is_jmp = DISAS_EXIT_UPDATE;
#endif /* defined(CONFIG_USER_ONLY) */
}
@@ -7506,7 +7499,7 @@ static void gen_wrteei(DisasContext *ctx)
if (ctx->opcode & 0x00008000) {
tcg_gen_ori_tl(cpu_msr, cpu_msr, (1 << MSR_EE));
/* Stop translation to have a chance to raise an exception */
- gen_stop_exception(ctx);
+ ctx->base.is_jmp = DISAS_EXIT_UPDATE;
} else {
tcg_gen_andi_tl(cpu_msr, cpu_msr, ~(1 << MSR_EE));
}
@@ -9128,9 +9121,6 @@ static void ppc_tr_translate_insn(DisasContextBase
*dcbase, CPUState *cs)
case POWERPC_EXCP_BRANCH:
ctx->base.is_jmp = DISAS_NORETURN;
break;
- case POWERPC_EXCP_STOP:
- ctx->base.is_jmp = DISAS_EXIT;
- break;
default:
/* Every other ctx->exception should have set NORETURN. */
g_assert_not_reached();
--
2.25.1
- [PATCH v5 00/23] Base for adding PowerPC 64-bit instructions, matheus . ferst, 2021/05/17
- [PATCH v5 01/23] target/ppc: Introduce gen_icount_io_start, matheus . ferst, 2021/05/17
- [PATCH v5 02/23] target/ppc: Replace POWERPC_EXCP_STOP with DISAS_EXIT_UPDATE,
matheus . ferst <=
- [PATCH v5 03/23] target/ppc: Replace POWERPC_EXCP_BRANCH with DISAS_NORETURN, matheus . ferst, 2021/05/17
- [PATCH v5 04/23] target/ppc: Remove DisasContext.exception, matheus . ferst, 2021/05/17
- [PATCH v5 05/23] target/ppc: Move single-step check to ppc_tr_tb_stop, matheus . ferst, 2021/05/17
- [PATCH v5 06/23] target/ppc: Tidy exception vs exit_tb, matheus . ferst, 2021/05/17
- [PATCH v5 07/23] target/ppc: Mark helper_raise_exception* as noreturn, matheus . ferst, 2021/05/17