[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH v5 13/23] target/ppc: Implement PNOP
From: |
David Gibson |
Subject: |
Re: [PATCH v5 13/23] target/ppc: Implement PNOP |
Date: |
Tue, 18 May 2021 10:36:58 +1000 |
On Mon, May 17, 2021 at 05:50:15PM -0300, matheus.ferst@eldorado.org.br wrote:
> From: Richard Henderson <richard.henderson@linaro.org>
>
> The illegal suffix behavior matches what was observed in a
> POWER10 DD2.0 machine.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Applied to ppc-for-6.1, thanks.
> ---
> v5:
> - Remove argument set from PNOP;
> - Use no_overlap_group for invalid suffixes.
> ---
> target/ppc/insn64.decode | 67 ++++++++++++++++++++++
> target/ppc/translate/fixedpoint-impl.c.inc | 11 ++++
> 2 files changed, 78 insertions(+)
>
> diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode
> index 1965088915..9aa5097a98 100644
> --- a/target/ppc/insn64.decode
> +++ b/target/ppc/insn64.decode
> @@ -28,3 +28,70 @@
>
> PADDI 000001 10 0--.-- .................. \
> 001110 ..... ..... ................ @PLS_D
> +
> +### Prefixed No-operation Instruction
> +
> +@PNOP 000001 11 0000-- 000000000000000000 \
> + ................................
> +
> +{
> + [
> + ## Invalid suffixes: Branch instruction
> + # bc[l][a]
> + INVALID ................................ \
> + 010000-------------------------- @PNOP
> + # b[l][a]
> + INVALID ................................ \
> + 010010-------------------------- @PNOP
> + # bclr[l]
> + INVALID ................................ \
> + 010011---------------0000010000- @PNOP
> + # bcctr[l]
> + INVALID ................................ \
> + 010011---------------1000010000- @PNOP
> + # bctar[l]
> + INVALID ................................ \
> + 010011---------------1000110000- @PNOP
> +
> + ## Invalid suffixes: rfebb
> + INVALID ................................ \
> + 010011---------------0010010010- @PNOP
> +
> + ## Invalid suffixes: context synchronizing other than isync
> + # sc
> + INVALID ................................ \
> + 010001------------------------1- @PNOP
> + # scv
> + INVALID ................................ \
> + 010001------------------------01 @PNOP
> + # rfscv
> + INVALID ................................ \
> + 010011---------------0001010010- @PNOP
> + # rfid
> + INVALID ................................ \
> + 010011---------------0000010010- @PNOP
> + # hrfid
> + INVALID ................................ \
> + 010011---------------0100010010- @PNOP
> + # urfid
> + INVALID ................................ \
> + 010011---------------0100110010- @PNOP
> + # stop
> + INVALID ................................ \
> + 010011---------------0101110010- @PNOP
> + # mtmsr w/ L=0
> + INVALID ................................ \
> + 011111---------0-----0010010010- @PNOP
> + # mtmsrd w/ L=0
> + INVALID ................................ \
> + 011111---------0-----0010110010- @PNOP
> +
> + ## Invalid suffixes: Service Processor Attention
> + INVALID ................................ \
> + 000000----------------100000000- @PNOP
> + ]
> +
> + ## Valid suffixes
> + PNOP ................................ \
> + -------------------------------- @PNOP
> +}
> diff --git a/target/ppc/translate/fixedpoint-impl.c.inc
> b/target/ppc/translate/fixedpoint-impl.c.inc
> index 344a3ed54b..ce034a14a7 100644
> --- a/target/ppc/translate/fixedpoint-impl.c.inc
> +++ b/target/ppc/translate/fixedpoint-impl.c.inc
> @@ -60,3 +60,14 @@ static bool trans_ADDIS(DisasContext *ctx, arg_D *a)
> a->si <<= 16;
> return trans_ADDI(ctx, a);
> }
> +
> +static bool trans_INVALID(DisasContext *ctx, arg_INVALID *a)
> +{
> + gen_invalid(ctx);
> + return true;
> +}
> +
> +static bool trans_PNOP(DisasContext *ctx, arg_PNOP *a)
> +{
> + return true;
> +}
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
signature.asc
Description: PGP signature
- Re: [PATCH v5 08/23] target/ppc: Use translator_loop_temp_check, (continued)
- [PATCH v5 09/23] target/ppc: Introduce macros to check isa extensions, matheus . ferst, 2021/05/17
- [PATCH v5 10/23] target/ppc: Move page crossing check to ppc_tr_translate_insn, matheus . ferst, 2021/05/17
- [PATCH v5 11/23] target/ppc: Add infrastructure for prefixed insns, matheus . ferst, 2021/05/17
- [PATCH v5 12/23] target/ppc: Move ADDI, ADDIS to decodetree, implement PADDI, matheus . ferst, 2021/05/17
- [PATCH v5 13/23] target/ppc: Implement PNOP, matheus . ferst, 2021/05/17
- Re: [PATCH v5 13/23] target/ppc: Implement PNOP,
David Gibson <=
- [PATCH v5 14/23] TCG: add tcg_constant_tl, matheus . ferst, 2021/05/17
- [PATCH v5 15/23] target/ppc: Move D/DS/X-form integer loads to decodetree, matheus . ferst, 2021/05/17
- [PATCH v5 16/23] target/ppc: Implement prefixed integer load instructions, matheus . ferst, 2021/05/17
- [PATCH v5 17/23] target/ppc: Move D/DS/X-form integer stores to decodetree, matheus . ferst, 2021/05/17
- [PATCH v5 18/23] target/ppc: Implement prefixed integer store instructions, matheus . ferst, 2021/05/17