Re: [PATCH v1 07/11] target/arm: Implement bfloat16 dot product (indexed)

[Richard Henderson]

On 5/18/21 7:24 AM, Peter Maydell wrote:
> > -    case 0x0f: /* SUDOT, USDOT */
> > -        gen_gvec_op4_ool(s, is_q, rd, rn, rm, rd, index,
> > -                         extract32(insn, 23, 1)
> > -                         ? gen_helper_gvec_usdot_idx_b
> > -                         : gen_helper_gvec_sudot_idx_b);
> > -        return;
> > -
> > +    case 0x0f:
> > +        switch (extract32(insn, 22, 2)) {
>
> You already have bits [23:22] in 'size' at this point, I think.

Irritatingly not.  For 0xf [23:22] is opcode, and size has been squashed to 
MO_32 in order to get the indexing correct in the middle of this function. 
It's just outside the patch context here.  Later it will be moved inside a 
switch for BFMLAL.

One of the many ways in which decodetree would be better here.


r~