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[PULL 13/31] cpu: Un-inline cpu_get_phys_page_debug and cpu_asidx_from_a
From: |
Richard Henderson |
Subject: |
[PULL 13/31] cpu: Un-inline cpu_get_phys_page_debug and cpu_asidx_from_attrs |
Date: |
Wed, 26 May 2021 16:46:52 -0700 |
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
To be able to later extract the cpu_get_phys_page_debug() and
cpu_asidx_from_attrs() handlers from CPUClass, un-inline them
from "hw/core/cpu.h".
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210517105140.1062037-7-f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/hw/core/cpu.h | 33 ++++-----------------------------
hw/core/cpu-sysemu.c | 32 ++++++++++++++++++++++++++++++++
2 files changed, 36 insertions(+), 29 deletions(-)
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index d45f78290e..df49528785 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -586,18 +586,8 @@ void cpu_dump_statistics(CPUState *cpu, int flags);
*
* Returns: Corresponding physical page address or -1 if no page found.
*/
-static inline hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
- MemTxAttrs *attrs)
-{
- CPUClass *cc = CPU_GET_CLASS(cpu);
-
- if (cc->get_phys_page_attrs_debug) {
- return cc->get_phys_page_attrs_debug(cpu, addr, attrs);
- }
- /* Fallback for CPUs which don't implement the _attrs_ hook */
- *attrs = MEMTXATTRS_UNSPECIFIED;
- return cc->get_phys_page_debug(cpu, addr);
-}
+hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
+ MemTxAttrs *attrs);
/**
* cpu_get_phys_page_debug:
@@ -609,12 +599,7 @@ static inline hwaddr
cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
*
* Returns: Corresponding physical page address or -1 if no page found.
*/
-static inline hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)
-{
- MemTxAttrs attrs = {};
-
- return cpu_get_phys_page_attrs_debug(cpu, addr, &attrs);
-}
+hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
/** cpu_asidx_from_attrs:
* @cpu: CPU
@@ -623,17 +608,7 @@ static inline hwaddr cpu_get_phys_page_debug(CPUState
*cpu, vaddr addr)
* Returns the address space index specifying the CPU AddressSpace
* to use for a memory access with the given transaction attributes.
*/
-static inline int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs)
-{
- CPUClass *cc = CPU_GET_CLASS(cpu);
- int ret = 0;
-
- if (cc->asidx_from_attrs) {
- ret = cc->asidx_from_attrs(cpu, attrs);
- assert(ret < cpu->num_ases && ret >= 0);
- }
- return ret;
-}
+int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs);
#endif /* CONFIG_USER_ONLY */
diff --git a/hw/core/cpu-sysemu.c b/hw/core/cpu-sysemu.c
index f517ef5d46..fe90dde868 100644
--- a/hw/core/cpu-sysemu.c
+++ b/hw/core/cpu-sysemu.c
@@ -22,6 +22,38 @@
#include "qapi/error.h"
#include "hw/core/cpu.h"
+hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
+ MemTxAttrs *attrs)
+{
+ CPUClass *cc = CPU_GET_CLASS(cpu);
+
+ if (cc->get_phys_page_attrs_debug) {
+ return cc->get_phys_page_attrs_debug(cpu, addr, attrs);
+ }
+ /* Fallback for CPUs which don't implement the _attrs_ hook */
+ *attrs = MEMTXATTRS_UNSPECIFIED;
+ return cc->get_phys_page_debug(cpu, addr);
+}
+
+hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)
+{
+ MemTxAttrs attrs = {};
+
+ return cpu_get_phys_page_attrs_debug(cpu, addr, &attrs);
+}
+
+int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs)
+{
+ CPUClass *cc = CPU_GET_CLASS(cpu);
+ int ret = 0;
+
+ if (cc->asidx_from_attrs) {
+ ret = cc->asidx_from_attrs(cpu, attrs);
+ assert(ret < cpu->num_ases && ret >= 0);
+ }
+ return ret;
+}
+
GuestPanicInformation *cpu_get_crash_info(CPUState *cpu)
{
CPUClass *cc = CPU_GET_CLASS(cpu);
--
2.25.1
- [PULL 14/31] cpu: Introduce cpu_virtio_is_big_endian(), (continued)
- [PULL 14/31] cpu: Introduce cpu_virtio_is_big_endian(), Richard Henderson, 2021/05/26
- [PULL 11/31] cpu: Remove duplicated 'sysemu/hw_accel.h' header, Richard Henderson, 2021/05/26
- [PULL 16/31] cpu: Directly use get_paging_enabled() fallback handlers in place, Richard Henderson, 2021/05/26
- [PULL 07/31] accel/tcg: Reduce 'exec/tb-context.h' inclusion, Richard Henderson, 2021/05/26
- [PULL 02/31] exec/memory_ldst_phys: Sort declarations, Richard Henderson, 2021/05/26
- [PULL 06/31] exec/memory: Use correct type size, Richard Henderson, 2021/05/26
- [PULL 05/31] exec/memory_ldst_cached: Use correct type size, Richard Henderson, 2021/05/26
- [PULL 09/31] replay: fix watchpoint processing for reverse debugging, Richard Henderson, 2021/05/26
- [PULL 10/31] tcg/aarch64: Fix tcg_out_rotl, Richard Henderson, 2021/05/26
- [PULL 08/31] accel/tcg: Keep TranslationBlock headers local to TCG, Richard Henderson, 2021/05/26
- [PULL 13/31] cpu: Un-inline cpu_get_phys_page_debug and cpu_asidx_from_attrs,
Richard Henderson <=
- [PULL 12/31] cpu: Split as cpu-common / cpu-sysemu, Richard Henderson, 2021/05/26
- [PULL 04/31] exec/memory_ldst_phys: Use correct type sizes, Richard Henderson, 2021/05/26
- [PULL 15/31] cpu: Directly use cpu_write_elf*() fallback handlers in place, Richard Henderson, 2021/05/26
- [PULL 20/31] cpu: Move AVR target vmsd field from CPUClass to DeviceClass, Richard Henderson, 2021/05/26
- [PULL 26/31] cpu: Move CPUClass::asidx_from_attrs to SysemuCPUOps, Richard Henderson, 2021/05/26
- [PULL 17/31] cpu: Directly use get_memory_mapping() fallback handlers in place, Richard Henderson, 2021/05/26
- [PULL 18/31] cpu: Assert DeviceClass::vmsd is NULL on user emulation, Richard Henderson, 2021/05/26
- [PULL 19/31] cpu: Rename CPUClass vmsd -> legacy_vmsd, Richard Henderson, 2021/05/26
- [PULL 22/31] cpu: Move CPUClass::vmsd to SysemuCPUOps, Richard Henderson, 2021/05/26
- [PULL 23/31] cpu: Move CPUClass::virtio_is_big_endian to SysemuCPUOps, Richard Henderson, 2021/05/26