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Re: [PATCH 3/6] target/microblaze: Assert transaction failures have exce


From: Edgar E. Iglesias
Subject: Re: [PATCH 3/6] target/microblaze: Assert transaction failures have exception enabled
Date: Thu, 3 Jun 2021 18:30:18 +0200

On Thu, Jun 03, 2021 at 11:03:07AM +0200, Philippe Mathieu-Daudé wrote:
> If exceptions are disabled, we must not get a transaction failure.
> Assert they are enabled passed that point.
> 
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  target/microblaze/op_helper.c | 4 +---
>  1 file changed, 1 insertion(+), 3 deletions(-)
> 
> diff --git a/target/microblaze/op_helper.c b/target/microblaze/op_helper.c
> index 8d20522ee88..1048e656e27 100644
> --- a/target/microblaze/op_helper.c
> +++ b/target/microblaze/op_helper.c
> @@ -122,9 +122,7 @@ void mb_cpu_transaction_failed(CPUState *cs, hwaddr 
> physaddr, vaddr addr,
>                    access_type == MMU_INST_FETCH ? "INST_FETCH" :
>                    (access_type == MMU_DATA_LOAD ? "DATA_LOAD" : 
> "DATA_STORE"));
>  
> -    if (!(env->msr & MSR_EE)) {
> -        return;
> -    }
> +    assert(env->msr & MSR_EE);


This doesn't look correct. MSR_EE is a runtime flag...


>  
>      if (access_type == MMU_INST_FETCH) {
>          if (!cpu->cfg.iopb_bus_exception) {
> -- 
> 2.26.3
> 



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