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[PULL 6/7] docs: add a table showing x86-64 ABI compatibility levels

From: Eduardo Habkost
Subject: [PULL 6/7] docs: add a table showing x86-64 ABI compatibility levels
Date: Fri, 18 Jun 2021 15:52:36 -0400

From: Daniel P. Berrangé <berrange@redhat.com>

It is useful to know which CPUs satisfy each x86-64 ABI
compatibility level, when dealing with guest OS that require
something newer than the baseline ABI.

These ABI levels are defined in:


and supported by GCC, Clang, glibc and more.

Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <20210607135843.196595-2-berrange@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
 MAINTAINERS                        |  2 +-
 docs/system/cpu-models-x86-abi.csv | 67 ++++++++++++++++++++++++++++++
 docs/system/cpu-models-x86.rst.inc | 22 ++++++++++
 3 files changed, 90 insertions(+), 1 deletion(-)
 create mode 100644 docs/system/cpu-models-x86-abi.csv

index 636bf2f5365..ccdb81c9f62 100644
@@ -328,7 +328,7 @@ F: tests/tcg/i386/
 F: tests/tcg/x86_64/
 F: hw/i386/
 F: disas/i386.c
-F: docs/system/cpu-models-x86.rst.inc
+F: docs/system/cpu-models-x86*
 T: git https://gitlab.com/ehabkost/qemu.git x86-next
 Xtensa TCG CPUs
diff --git a/docs/system/cpu-models-x86-abi.csv 
new file mode 100644
index 00000000000..f3f3b60be10
--- /dev/null
+++ b/docs/system/cpu-models-x86-abi.csv
@@ -0,0 +1,67 @@
diff --git a/docs/system/cpu-models-x86.rst.inc 
index 867c8216b5a..f40ee03ecc0 100644
--- a/docs/system/cpu-models-x86.rst.inc
+++ b/docs/system/cpu-models-x86.rst.inc
@@ -39,6 +39,28 @@ CPU, as they would with "Host passthrough", but gives much 
of the
 benefit of passthrough, while making live migration safe.
+ABI compatibility levels for CPU models
+The x86_64 architecture has a number of `ABI compatibility levels`_
+defined. Traditionally most operating systems and toolchains would
+only target the original baseline ABI. It is expected that in
+future OS and toolchains are likely to target newer ABIs. The
+table that follows illustrates which ABI compatibility levels
+can be satisfied by the QEMU CPU models. Note that the table only
+lists the long term stable CPU model versions (eg Haswell-v4).
+In addition to whats listed, there are also many CPU model
+aliases which resolve to a different CPU model version,
+depending on the machine type is in use.
+.. _ABI compatibility levels: https://gitlab.com/x86-psABIs/x86-64-ABI/
+.. csv-table:: x86-64 ABI compatibility levels
+   :file: cpu-models-x86-abi.csv
+   :widths: 40,15,15,15,15
+   :header-rows: 2
 Preferred CPU models for Intel x86 hosts

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