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Re: [PATCH] target/mips: Raise exception when DINSV opcode used with DSP


From: Philippe Mathieu-Daudé
Subject: Re: [PATCH] target/mips: Raise exception when DINSV opcode used with DSP disabled
Date: Sat, 19 Jun 2021 20:01:28 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.10.1

On 5/29/21 6:54 PM, Philippe Mathieu-Daudé wrote:
> Per the "MIPS® DSP Module for MIPS64 Architecture" manual, rev. 3.02,
> Table 5.3 "SPECIAL3 Encoding of Function Field for DSP Module":
> 
>   If the Module/ASE is not implemented, executing such an instruction
>   must cause a Reserved Instruction Exception.
> 
> The DINSV instruction lists the following exceptions:
> - Reserved Instruction
> - DSP Disabled
> 
> If the MIPS core doesn't support the DSP module, or the DSP is
> disabled, do not handle the '$rt = $0' case as a no-op but raise
> the proper exception instead.
> 
> Cc: Jia Liu <proljc@gmail.com>
> Fixes: 1cb6686cf92 ("target-mips: Add ASE DSP bit/manipulation instructions")
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  target/mips/tcg/translate.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)

Thanks, applied to mips-next.



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