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Re: [PATCH 20/28] target/arm: Improve REV32

From: Peter Maydell
Subject: Re: [PATCH 20/28] target/arm: Improve REV32
Date: Mon, 21 Jun 2021 16:08:52 +0100

On Mon, 14 Jun 2021 at 09:38, Richard Henderson
<richard.henderson@linaro.org> wrote:
> For the sf version, we are performing two 32-bit bswaps
> in either half of the register.  This is equivalent to
> performing one 64-bit bswap followed by a rotate.
> For the non-sf version, we can remove TCG_BSWAP_IZ
> and the preceding zero-extension.
> Cc: Peter Maydell <peter.maydell@linaro.org>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

-- PMM

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